G.999.1 Verification IP

Overview

The G_999_1 Verification IP is compliant with ITU-T G.999.1 specifications and verifies MAC-to-PHY interfaces of designs with a 1G Ethernet interface GMII/GMII TBI. It can work with SystemVerilog,Vera, SystemC, E and Verilog HDL environment. G_999_1 Verification IP is developed by experts in Ethernet, who have developed ethernet products in companies like Intel, Cortina-Systems, Emulex, Cisco. We know what it takes to verify a ethenet product.

G.999.1 Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

G.999.1 Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key Features

Follows G.999.1 specification as defined in ITU-T standard
Supports fragmentation
Supports with and without Ethernet adaption.
Supports full duplex and half duplex of operation
Supports Pause frame generation and detection.
Supports all types of G_999_1 TX and RX errors insertion/detection.
- Oversize, undersize, inrange, out of range Packet size errors
- Missing SPD/EPD/SFD framing errors
- SFD on wrong lane
- CRC Error
- Disparity error injection
- Invalid /D/ and /K/ character injection
- Variable preamble and IPG insertion
Comes with G_999_1 Tx BFM, G_999_1 Rx BFM, and G_999_1 Monitor
Monitor supports detection of all protocol violations.
Built in coverage analysis.
Callbacks in master and slave for various events
Status counters for various events in bus

Benefits

Faster testbench development and more complete verification of G_999_1 designs
Easy to use command interface simplifies testbench control and configuration of G_999_1 TX and G_999_1 RX
Simplifies results analysis
Runs in every major simulation environment

Block Diagram

Deliverables

Complete regression suite (UNH) containing all the testcases.
Examples showing how to connect various components, and usage of TXRX BFM and Monitor.
Detailed documentation of all class, task and function's used in verification env.
Documentation also contains User's Guide and Release notes.

Technical Specifications

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