ZSPNano+ is a small, energy efficient, Digital Signal Processor Core for
high performance Voice/Audio/Wireless applications. The compiler friendly
architecture offers an orthogonal instruction set that greatly simplifies
programming complex DSP algorithms and control code, with compact code
density.
Digital Signal Processor IP
Overview
Key Features
- • Four 16b macs/cycle or Two 32b macs/cycle
- • 8/16/32/64 data types
- • SIMD support
- • High precision (upto 72 bit accumulation)
- • Low power modes of operation
- • 128 bit data bandwidth
- • TCM and Cache memories
- • 4GB addressable space
- • ZTurbo interface for custom accelerators
- • Optional FPUs
- • Optional MPU
Technical Specifications
Foundry, Node
All
Maturity
Silicon Integration
Availability
now
Related IPs
- 16-bit digital signal processor soft core
- 16-bit digital signal processor soft core
- 24-bit digital signal processor soft core.
- Digital Signal Processor (DSP) for image processing
- Digital Signal Processor Software compatible with the TI 320C50, 320C51, 320C52 and 320C53
- Ultra low power C-programmable Baseband Signal Processor core