56Gbps LR SerDes IP on TSMC 7nm
Overview
Credo is the world leading SerDes Technology. SerDes PMA is silicon proven IP offers in TSMC 7nm processes. Features include excellent insertion loss handling for commuication applications; high-performance supply noise immunity for SoC integration; Build-in Analog calibration for handling process variation; on-chips diagnosis i.e. Loop back testing, PRBS Checker, eye margin monitor, and analog test point monitors ready for chip production.
Key Features
- TSMC 7nm process
- Area & Power: Please contact us
- 64-bits TX/RX digital interface
- Dual Lane RX & TX Macro with Integrated Independent PLLs
- On chip eye monitor
- Automatic calibration of analog circuits
- PRBS loopback test
- APB3.0 bus for management registers
Benefits
- Low Power
- Excellent insertion loss handling for enterprise class backplane and optical applications.
- High-performance supply noise immunity for SoC integration.
- Build-in Analog calibration for handling process variation.
Applications
- High speed wireline communication
Deliverables
- Verilog Model
- LEF view
- Timing Libraries
- ATPG Model & Netlist
- GDS
- Spice Netlist
- Usage Guide and Documentation
- Free Integration Review
Technical Specifications
Foundry, Node
TSMC 7nm
Maturity
Silicon Proven Production
Availability
Available Now
TSMC
In Production:
7nm