12-bit, 50 MSPS Analog-to-Digital Converter IP block

Overview

The A12B50M is an ultra low-power, pipeline analog to digital converter (ADC) intellectual property (IP) design block. It has 12-bit resolution and a sampling rate of up to 50 megasamples per second (MSPS).

The A12B50M maintains its high-performance while consuming an exceptionally low power of only 11.8 mW, making it an outstanding solution for high efficiency designs and applications.

The cost-effective IP block has been designed and verified in a 180 nm CMOS process.

Available as IP and Integrated Circuit.

Key Features

  • 12-bit resolution
  • 50 MSPS sampling rate
  • 9 mW power
  • 50 MHz Input Bandwidth
  • Dynamic Performance:
    • SFDR: 78
    • ENOB: 10.8
  • Hard IP block
  • ONSemiconductor 180 nm process
  • Verified Design
  • Radiation-tolerant design available: A12B50MRH

Benefits

  • Save time-to-market with our ready-to-go complete product solutions for your commercial or radiation tolerant specifications demands. Our IP uses the latest technology nodes for easy integration, or upon request, can be ported to other nodes.
  • Our IC project teams will become an extension of your system development group, allowing you to focus on your overall end products.

Applications

  • Battery Powered Instruments
  • Sensor/Detector Readout
  • Imaging applications:
    • Image Sensor Readout
    • Infrared FPA Readout
    • Medical Imaging

Deliverables

  • Verified Design Report
  • Layout View (gds2)
  • Integration Support

Technical Specifications

Foundry, Node
ONSemi, 180nm CMOS
Maturity
Verified Design
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Semiconductor IP