General Purpose PLL IP for Renesas
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General Purpose PLL IP
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General Purpose PLL IP
for Renesas
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Ultra-low Jitter Fractional-N Frequency Synthesizer PLL (5nm - 180nm)
- Jitter-Power optimized to meet PCIe1-5 reference clock requirements - replaces 300mW/$2.50 clock chip
- Low area on chip -- keepouts = DRC limit in most cases
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Fractional-N Frequency Synthesizer PLL
- Wide functional range allows all frequencies in a system to be synthesized with one PLL macro
- Input & output frequency ranges greater than 1000:1
