The OT1153 series on-chip regulators allow for efficient on-chip conversion of IO voltages to Core voltages. E.g. 3.3V to 1.2V with only one external inductor and one external capacitor. 2MHz conversion frequency is used to minimize the size of the external components. Input voltages of 2.5-5V are available and currents up to 80mA. Versions with internal or external references are available. In normal operation constant on time PWM modulation is used, with an optional low power mode in which where the synchronous rectifier is disabled.
On-Chip IO to Core Voltage Buck Regulator on UMC 55nm ULP
Overview
Key Features
- Input voltages of 2.5V, and 3.3V.
- Available output currents to 100mA.
- Available output voltages 0.91V to 1.2V.
- Works with straight-through IO pads.
- Soft startup.
- Optional frequency sync input.
- 10mVpp ripple.
- Suspend mode input lowers regulator power for light loads, by using a non-synchronous rectifier, and low frequency.
- Typical 50µH, and 1µF external components.
- -40°C to 125°C temperature operation.
- Base cell area 0.18mm2 in UMC 55nm ULP process.
- Available reference, and frequency dither cells.
Block Diagram
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Applications
- Efficient on-chip core power generation from external IO power.
- Replacement of external buck regulator chips in low power applications.
Deliverables
- GDS layout.
- LEF outline.
- Spice/CDL netlist for LVS.
- Black box timing files.
- Design review documentation.
- Integration notes.
Technical Specifications
Foundry, Node
UMC 55nm ULP
UMC
Pre-Silicon:
55nm
Related IPs
- Programmable LDO voltage regulator (output voltage 2.5 V to 2.7 V)
- Programmable LDO voltage regulator (output voltage 2.5 V to 2.7 V)
- Programmable LDO voltage regulator (output voltage 1.6 to 2.2 V)
- LDO voltage regulator (output voltage 0 to 1.8 V)
- 75mA Core Voltage Regulator
- UMC 55nm ULP Bandgap / Current Reference