ChipScope Pro IBERT for 7 Series GTP
Xilinx, Inc.
•
HQ:
USA
The customizable LogiCORE™ IP ChipScope™ Pro Integrated Bit Error Ratio Test (IBERT) core for 7 series FPGA GTP transceivers is d…
- Test / Debug
Compare 339 Xilinx, Inc. IP Cores from 1 vendors
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AXI4-Stream Accelerator Adapter
Xilinx, Inc.• HQ: USAThe AXI4-Stream Accelerator Adapter is a soft Xilinx® LogiCORE™ Intellectual Property (IP) core used as a infrastructure block fo…
- Protocol Bridge
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AXI Memory Mapped to PCI Express (PCIe) Gen2
Xilinx, Inc.• HQ: USAThe AXI Memory Mapped to PCIe® Gen2 IP core provides an interface between the AXI4 interface and the Gen2 PCI Express (PCIe) sili…
- PCI Express
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AXI Bridge for PCI Express (PCIe) Gen3 Subsystem
Xilinx, Inc.• HQ: USAThe AXI PCIe® Gen 3 core provides an interface between the AXI4 interface and the Gen 3 PCI Express (PCIe) silicon hard core.
- PCI Express
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7 Series Gen2 Integrated Block for PCI Express (PCIe)
Xilinx, Inc.• HQ: USAXilinx provides a 7 Series FPGA solution for PCI Express® (PCIe) to configure the 7 Series FPGA Integrated Block for PCIe and inc…
- PCI Express
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Xilinx, Inc.• HQ: USA
Xilinx provides a generic forward error correction (FEC) engine to generate and insert a SMPTE ST2022 compliant video over IP FEC…
- Channel Coding
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AXI 1G/2.5G Ethernet Subsystem
Xilinx, Inc.• HQ: USAThe AXI Ethernet Subsystem provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset.
- Ethernet
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64-bit Initiator/Target for PCI-X & 32- and 64-bit Initiator/Target for PCI
Xilinx, Inc.• HQ: USADO-DI-PCIX64-VE rolls the Initiator/Target for PCI ™/PCI-X ™, 32-bit Initiator/Target for PCI and 64-bit Initiator/Target for PCI…
- PCI
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MIPI CSI-2 RX Controller Subsystem
Xilinx, Inc.• HQ: USAThe Xilinx MIPI CSI2 Receiver Subsystem implements the Mobile Industry Processor Interface (MIPI) based Camera Serial Interface (…
- MIPI
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Xilinx, Inc.• HQ: USA
The Backhaul Low Density Parity Check (LDPC) core IP provides a high-performance forward error correction (FEC) solution for mobi…
- Channel Coding
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Flash Memory LDPC Error Correction
Xilinx, Inc.• HQ: USAThe Xilinx® LogiCORE™ IP Flash Memory low-density parity-check (LDPC) Error Correction core is a major component for improving fl…
- Channel Coding
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Xilinx, Inc.• HQ: USA
The Xilinx® CAN IP core is ideally suited for automotive and industrial applications such as automotive gateways, body control un…
- CAN / CAN-FD / CAN-XL
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Xilinx, Inc.• HQ: USA
The Xilinx® LogiCORE™ IP 10G/25G Ethernet solution provides a 10 Gigabit or 25 Gigabit per second (Gbps) Ethernet Media Access Co…
- Ethernet
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Xilinx, Inc.• HQ: USA
Xilinx 40G/100G Ethernet LogiCORE based on Sarance Technologies Best-In-Class Intellectual Property Xilinx High-Speed Ethernet Lo…
- Ethernet
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Xilinx, Inc.• HQ: USA
The LogiCORE™ IP Virtual Input/Output (VIO) core is a customizable core that can both monitor and drive internal FPGA signals in …
- Debug Trace
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Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)
Xilinx, Inc.• HQ: USAXilinx provides a PCI Express Gen3 integrated block for PCI Express® (PCIe) in the Virtex®-7 XT and HT family of FPGAs.
- PCI Express
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Xilinx, Inc.• HQ: USA
Included at no additional charge with ISE software.
- Video Processing
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Xilinx, Inc.• HQ: USA
Xilinx Test Pattern Generator IP Core provides convenient generation of test patterns for Video System bring up, evaluation and d…
- Video Processing
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Xilinx, Inc.• HQ: USA
Xilinx provides a SPDIF Controller to transport audio data.
- SPDIF
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Xilinx, Inc.• HQ: USA
Included at no additional charge with EDK software.
- CPU