High-Speed Serial IP cores enable the high-bandwidth connectivity required by modern SoCs, AI accelerators, networking equipment, storage systems, telecom infrastructure, aerospace platforms, and data center devices. These IP solutions provide reliable, standards-compliant communication between chips, boards, systems, and external networks.
This catalog includes IP cores supporting industry-standard protocols such as PCI Express, CXL, Ethernet, USB, Fibre Channel, SAS, InfiniBand, Interlaken, JESD204, Optical Transport, CPRI, RapidIO, UniPro, CoaXPress, SpaceWire, and other high-speed serial interfaces. Solutions may include PHYs, controllers, protocol stacks, subsystem IP, and verification components.
Compare high-speed serial IP offerings from multiple vendors based on supported standards, data rates, feature sets, protocol compliance, silicon efficiency, and target applications to identify the right connectivity solution for advanced ASIC and SoC designs.
Sensor / Display MIPI A-PHY Source IP
The CL12911IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking ap…
Sensor/Display MIPI A-PHY Sink IP
The CL12912IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking ap…
Certus is pleased to offer Reduced Gigabit Media Independent Interface (RGMII) compliant IOs in technology nodes.
SLVS-EC TX PHY - 10GBPS 8-Lane - TSMC 12FFC
The CL12811M8TIP10000 TXPHY supports 8 TX DATA lanes for up to 10Gbps application.
The PCI Express® (PCIe®) Controller IP is a configurable, performance-optimized core designed for ASIC and FPGA integration.
The Universal Media Access Controller (UMAC) ensures efficient data flow, low latency, and optimized power usage.
Synchronous Ethernet (SyncE) ESMC and Enhanced ESMC core
NetTimeLogic’s Synchronous Ethernet (SyncE) Node is a full hardware (FPGA) only implementation of an ESMC frame Handler and State…
Low-latency Controller IP for cache-coherent root-port, end-point, and dual-mode applications
OSU processor, optimized for E1/FE/GE services with Ethernet over SDH over OTU0/OTU1 lines
The TPS3215MP OSU processor is an IP Core solution designed for Xilinx FPGAs.
FC Upper Layer Protocol (ULP) IP Core
The Fibre Channel Upper Layer Protocol (FC-ULP) core provides a FC-4 layer hardware IP solution for the Fibre Channel Avionics En…
USB 3.1 Gen1 / Gen2 Host Controller IP
USB 3.1 Host Controller is compliance with USB3.1 specification, Revision 1.0 and all associated ECN’s, USB specifications Rev 2.…
DVB-GSE Encapsulator and Decapsulator
The DVB-GSE encapsulator and decapsulator IP cores close the gap between network protocols like Ethernet and the physical layer o…
The PCI Express® (PCIe®) 6.1 Controller is configurable and scalable controller IP designed for ASIC implementation.
The PCIe 2.1 Controller (formerly XpressRICH) is designed to achieve maximum PCI Express (PCIe) 2.1 performance with great design…
The PCIe 2.1 Controller (formerly XpressRICH) is designed to achieve maximum PCI Express (PCIe) 2.1 performance with great design…
The PCIe Switch for USB4 (formerly XpressSWITCH) is a customizable, embedded switch for PCI Express (PCIe) designed for implement…
The Compute Express Link™ (CXL™) 2.0 Controller (formerly XpressLINK) leverages a silicon-proven PCIe 5.0 controller architecture…
The Compute Express Link™ (CXL™) 2.0 Controller (formerly XpressLINK) leverages a silicon-proven PCIe 5.0 controller architecture…
We provide configurable USB 2.0 device controller IP Cores.
Time Sensitive Networking (TSN) Single Port End Node core
The TSN End Node IP core from NetTimeLogic is a standalone Time Sensitive Networking (TSN) single port end node core according to…