High-Performance Memory Expansion IP for AI Accelerators
AI inference performance is increasingly constrained by memory bandwidth and capacity - not compute.
- Data Compression
Data Compression IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare Data Compression IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
High-Performance Memory Expansion IP for AI Accelerators
AI inference performance is increasingly constrained by memory bandwidth and capacity - not compute.
The Cache MX IP compresses on-chip L2, L3 SRAM cache enabling 2x effective capacity.
High performance and low latency hardware accelerated zram/zswap at unmatched power efficiency
The SuperRAM implements a hardware accelerator for zram compression and decompression.
Up to 50% main memory bandwidth acceleration
The Ziptilion Bandwidth IP accelertes the main memory bandwidth with up to 50%.
ZLIB compatible compression and decompession, with DMA and AXi interface
This is a high performance, small footprint ZLIB compatible IP Core.
2K TicoRAW Encoder / Decoder for RAW CFA sensor data compression
Engineered at intoPIX, TicoRAW is an , lossless quality, low-power, low-memory and line-based image processing and compression te…
8K TicoRAW Encoder / Decoder for RAW CFA sensor data compression
Engineered at intoPIX, TicoRAW is an , lossless quality, low-power, low-memory and line-based image processing and compression te…
4K TicoRAW Encoder / Decoder for RAW CFA sensor data compression
Engineered at intoPIX, TicoRAW is an , lossless quality, low-power, low-memory and line-based image processing and compression te…
LZ4SNP-C is a custom hardware implementation of a lossless data compression engine that complies with the LZ4 and Snappy compress…
The Flash MX IP Core implements a hardware accelerator for zstd compression and decompression.
Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
KJN-S1 is able to get Higher performance lossless Compression by original algorithm.
High Throughput and Low Latency Data Compression Engine
This IP implements a proprietary modified LZ77 algorithm and provides very high speed data compression with low latency and very …
Lossless / Near lossless Encoder / Decoder Hardware IP
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High Throughput and Low Latency Compression Engine For SSD
The high performance compression IPhere compresses at the line rate of 16Gbps in ASIC or up to 64 Gbps for custom implementations.
Continuously Variable Slope Delta Modulation
The growth in wireless communication systems, cellular mobile radio and VoIP technology has created the imperative need for bandw…
ITU-T G729A Voice Codec Hardware Accelerator
The growth in wireless communication systems, cellular mobile radio and VoIP technology has created the imperative need for bandw…
The ntG711_EXP core implements the ITU G.711 compliant expanding.
LZ4SNP-D is a custom hardware implementation of a lossless data decompression engine for the LZ4 and Snappy compression algorithm…
QOI Image Decompressor IP Core
This core implements the QOI lossless image compression algorithm decompressing QOI header-less files and producing RGB 24 bits p…
This core implements the QOI lossless image compression algorithm producing a raw, header-less file.