Vendor: Xilinx, Inc. Category: PCI Express

Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)

Xilinx provides a PCI Express Gen3 integrated block for PCI Express® (PCIe) in the Virtex®-7 XT and HT family of FPGAs.

Overview

Xilinx provides a PCI Express Gen3 integrated block for PCI Express® (PCIe) in the Virtex®-7 XT and HT family of FPGAs. The Virtex-7 FPGA solution for PCI Express Gen3 includes all of the necessary components to create a complete solution for PCIe. Delivered through the IP Catalog, the Xilinx IP for Endpoint and Root Port simplifies the design process and reduces time-to-market.

This core combined with Xilinx Targeted Design Platforms, helps customers develop system solutions.

Key features

  • Compliant with the PCI Express Base Specification 3.0
  • Supported Lane width: x1, x2, x4 and x8
  • Fully compliant with PCI Express transaction ordering rules
  • Optimal buffering for high bandwidth Direct Memory Access (DMA) applications
  • Bandwidth scalability interconnect width
  • AXI4-Stream Interface

Specifications

Identity

Part Number
Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: USA

Learn more about PCI Express IP core

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Frequently asked questions about PCIe IP cores

What is Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)?

Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe) is a PCI Express IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this PCI Express?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PCI Express IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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