UHD Serial Digital Interface (UHD-SDI)
Xilinx, Inc.
•
HQ:
USA
The UHD Serial Digital Interface (UHD-SDI), is widely used in broadcast applications for the transport of uncompressed digital vi…
- Video Transport
Compare 339 Xilinx, Inc. IP Cores from 1 vendors
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Xilinx, Inc.• HQ: USA
The LogiCORE™ IP System Management Wizard provides a solution for system-monitoring Xilinx UltraScale™ architecture-based devises.
- System Controller
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Xilinx, Inc.• HQ: USA
Supports emerging standards for lowering cost of uncompressed HD video transport Reduce the cost of multichannel SD/HD/3G-SDI des…
- Video Transport
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Xilinx, Inc.• HQ: USA
The LogiCORE™ IP SDI Tx and RX Video Bridge cores are designed to interface the SDI ports of the SMPTE SDI core to the video port…
- Video Transport
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Xilinx, Inc.• HQ: USA
The Xilinx Processor System Reset Module design allows the customer to tailor the design to suit their application by setting cer…
- Reset Controller
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Partial Reconfiguration Decoupler IP
Xilinx, Inc.• HQ: USAThe Partial Reconfiguration (PR) Decoupler IP provides logical isolation capabilities for PR designs.
- System Controller
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Partial Reconfiguration Controller
Xilinx, Inc.• HQ: USAThe Partial Reconfiguration Controller (PRC) IP provides management functions for Partial Reconfiguration designs.
- System Controller
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Xilinx, Inc.• HQ: USA
Memory Interface is a free software tool used to generate memory controllers and interfaces for Xilinx® FPGAs.
- Bus Fabric
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LogiCore AXI to AHB-Lite Bridge IP
Xilinx, Inc.• HQ: USAIncluded at no additional charge with Vivado Design and System edition of software.
- Protocol Bridge
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Xilinx, Inc.• HQ: USA
The LogiCORE™ JTAG to AXI Master IP core is a customizable core that can generate the AXI transactions and drive the AXI signals …
- Debug Trace
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IBERT for UltraScale GTY Transceivers
Xilinx, Inc.• HQ: USAThe customizable LogiCORE™ IP Integrated Bit Error Ratio Tester (IBERT) core for UltraScale™ architecture GTY transceivers is des…
- Test / Debug
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IBERT for UltraScale GTH Transceivers
Xilinx, Inc.• HQ: USAThe customizable LogiCORE™ IP Integrated Bit Error Ratio Tester (IBERT) core for UltraScale architecture GTH transceivers is desi…
- Test / Debug
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IBERT for 7 Series GTZ Transceivers
Xilinx, Inc.• HQ: USAThe customizable LogiCORE™ IP Integrated Bit Error Ratio Test (IBERT) core for 7 series FPGA GTZ transceivers is designed for eva…
- Test / Debug
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Xilinx, Inc.• HQ: USA
The LogiCORE™ IP UltraScale™ High Speed SelectIO Wizard generates customized HDL wrappers to configures the UltraScale FPGA on-ch…
- High-Speed
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Xilinx, Inc.• HQ: USA
The Xilinx® HDMI solutions include HDMI TX and RX subsystems.
- HDMI
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Xilinx, Inc.• HQ: USA
The HARD_TEMAC described in this document has been designed incorporating the applicable features described in IEEE Std.
- Ethernet
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Ethernet 1G/2.5G BASE-X PCS/PMA or SGMII
Xilinx, Inc.• HQ: USAThe Xilinx Ethernet 1G/2.5G PCS/PMA or SGMII IP LogiCORE™ provides an Ethernet Physical Coding Sublayer (PCS) with a choice of ei…
- Single-Protocol PHY
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Error Correction Checking (ECC) Core
Xilinx, Inc.• HQ: USAThe Xilinx LogiCORE™ IP ECC core is ideal for robust data transmission with error correction and checking capabilities.
- Channel Coding
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DMA for PCI Express (PCIe) Subsystem
Xilinx, Inc.• HQ: USAThe Xilinx® LogiCORE™ DMA for PCI Express® (PCIe) implements a high performance, configurable Scatter Gather DMA for use with the…
- PCI Express
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ChipScope Pro IBERT for 7 Series GTZ
Xilinx, Inc.• HQ: USAThe customizable LogiCORE™ IP ChipScope™ Pro Integrated Bit Error Ratio Test (IBERT) core for 7 series FPGA GTZ transceivers is d…
- Test / Debug