Vendor: Xilinx, Inc. Category: Reset Controller

Processor System Reset Module

The Xilinx Processor System Reset Module design allows the customer to tailor the design to suit their application by setting cer…

Overview

The Xilinx Processor System Reset Module design allows the customer to tailor the design to suit their application by setting certain parameters to enable/disable features. The parameterizable features of the design are discussed in Processor System Reset Module Design Parameters.

Key features

  • Asynchronous external reset input is synchronized with clock.
  • Asynchronous auxiliary external reset input is synchronized with clock.
  • Both the external and auxiliary reset inputs are selectable active high or active low.
  • Selectable minimum pulse width for reset inputs to be recognized.
  • Selectable load equalizing.
  • DCM Locked input.
  • Power On Reset generation.

Specifications

Identity

Part Number
Processor System Reset Module
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: USA

Learn more about Reset Controller IP core

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Cortex-M And Classical Series ARM Architecture Comparisons

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Frequently asked questions about reset controller IP cores

What is Processor System Reset Module?

Processor System Reset Module is a Reset Controller IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Reset Controller?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Reset Controller IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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