Vendor: Xilinx, Inc. Category: Channel Coding

Error Correction Checking (ECC) Core

The Xilinx LogiCORE™ IP ECC core is ideal for robust data transmission with error correction and checking capabilities.

Overview

The Xilinx LogiCORE™ IP ECC core is ideal for robust data transmission with error correction and checking capabilities. The adaptable core supports Hamming and Hsiao algorithms for Single Error Correction and Double Error Detection (SEC-DED) error correction codes (ECC). The ECC core supports data widths between 4 and 128 bits and can be used with internal and external memories and with high speed Multi Gigabit transceivers.

Key features

  • Supports Single Bit Error correction and double bit error detection functions
  • Supports hamming algorithm for 4 to 64 data widths
  • Supports Hsiao algorithm for 4 to 128 data widths
  • Supports encode only, decode only and encode/decode modes
  • Supports clock enable and synchronous active high reset
  • Provides option to add input/output registering stages
  • Provides optional internal pipelining stage for high frequency operations
  • Supports dynamically enabling or disabling error correction function
  • Provides Single Bit Error corrected and two bit error detected status outputs

Specifications

Identity

Part Number
Error Correction Checking (ECC) Core
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: USA

Learn more about Channel Coding IP core

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Frequently asked questions about Channel Coding IP cores

What is Error Correction Checking (ECC) Core?

Error Correction Checking (ECC) Core is a Channel Coding IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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