Altera IP Cores

The 50G Ethernet Intel® FPGA IP core implements the 25G & 50G Ethernet Specification, Draft 1.4 from the 25 Gigabit Ethernet Cons…

• Ethernet

The 40G Ethernet MAC and PHY FPGA IP core offers IEEE 802.3ba-2010.

• Single-Protocol PHY

This IP core implements the 25G and 50G Ethernet Specification, Draft 1.4 from the 25 Gigabit Ethernet Consortium.

• Ethernet

The 1G/10G Ethernet PHY Intel® FPGA Intellectual Property (IP) core supports functionality of both the standard physical coding s…

• Single-Protocol PHY

The Multi-Rate Ethernet PHY FPGA IP core can dynamically support multiple data rates without any design regeneration or device re…

• Single-Protocol PHY

The XAUI PHY Intel® FPGA IP core allows you to easily build systems with a very high throughput 10G Ethernet connection.

• Single-Protocol PHY

The Viterbi Intel FPGA IP core generates high-performance, soft-decision Viterbi intellectual property (IP) functions that implem…

• Channel Coding

As a part of the Video and Vision Processing (VVP) Suite Intel® FPGA IP, the Warp Intel® FPGA IP provides a optimized solution fo…

• Video Processing

The Intel® FPGA Video and Vision Processing Suite is a collection of next-generation Intel® FPGA intellectual property (IP) funct…

• Video Processing

Forward-error correction (FEC) channel codes commonly improve the energy efficiency of wireless communication systems.

• Channel Coding

As a part of the Video and Vision Processing (VVP) Suite Intel® FPGA IP, the Tone Mapping Operator (TMO) Intel® FPGA IP corrects …

• Video Processing

The Reed Solomon II Intel® FPGA intellectual property (IP) core offers a fully parameterizable Reed Solomon encoder and decoder.

• Channel Coding

The Reed-Solomon (RS) compiler offers a fully parameterizable RS coder and RS decoder.

• Channel Coding

A numerically controlled oscillator (NCO) is a digital signal generator, which synthesizes a discrete-time, discrete-valued repre…

• Control Logic

The High-Speed Reed Solomon Intel® FPGA intellectual property (IP) core uses a large parallel architecture to achieve a large thr…

• Channel Coding

The FIR II Intel IP core provides a fully-integrated finite impulse response (FIR) filter function optimized for use with Intel F…

• Filters Transforms

The Fast Fourier transform (FFT) Intel FPGA intellectual property (IP) core is a high-performance, parameterizable FFT processor.

• Filters Transforms

The CIC Intel FPGA IP core implements a Cascaded integrator-comb (CIC) filter with data ports that are compatible with the Avalon…

• Filters Transforms

The Bose, Chaudhuri, and Hocquenghem (BCH) error correction intellectual property (IP) core is typically used in NAND flash appli…

• Channel Coding

The 5G Polar Intel® FPGA IP implements a forward error correction (FEC) encoder and decoder based on polar codes compliant with t…

• Channel Coding