Altera
•
HQ:
USA
Intel is discontinuing the intellectual property (IP) for RapidIO I and RapidIO II Intel offers two distinct Intel® FPGA IPs for …
- RapidIO
Compare 74 Altera IP Cores from 1 vendors
-
-
Intel® Precision Time Protocol Servo (Intel® PTP Servo) FPGA IP
Altera• HQ: USACoordinate the actions of disparate electronic systems that must be synchronized in time with Intel® PTP Servo, which employs har…
- IEEE-1588 / PTP
-
Scalable Switch Intel® FPGA IP for PCI Express
Altera• HQ: USAThe Scalable Switch Intel® FPGA IP for PCI Express is a fully configurable switch that implements one fully configurable upstream…
- PCI Express
-
Altera• HQ: USA
Agilex™ 5 FPGAs and SoC FPGAs are monolithic designs with integrated high-speed transceivers (GTS) and hardened PCIe controller I…
- PCI Express
-
Altera• HQ: USA
The F-Tile Intel® Hard IP supports PCIe* configurations up to 4.0 x16 in Endpoint (EP), Root Port (RP), and Transaction Layer (TL…
- PCI Express
-
Intel® Arria® 10 and Intel® Cyclone® 10 PCIe Hard IP
Altera• HQ: USAIntel® Arria® 10 and Intel® Cyclone® 10 GX FPGAs include a configurable, hardened protocol stack for PCI Express* that is complia…
- PCI Express
-
Altera• HQ: USA
The Extensible Radio Access Network (O-RAN WG4 Fronthaul Interface) defines a fronthaul interface between a lower-layer split dis…
- Cellular
-
Multichannel DMA Intel FPGA IP for PCI Express*
Altera• HQ: USAThe Multichannel DMA IP for PCI Express provides high efficiency, speed, and configuration flexibility to support various applica…
- PCI Express
-
Altera• HQ: USA
The MACsec Intel® FPGA IP core implements the IEEE Media Access Control Security standard as defined in 802.1AE (2018) as fully c…
- MACsec
-
Low Latency Ethernet 10G MAC FPGA IP
Altera• HQ: USAThe Low Latency Ethernet 10G MAC FPGA IP core (soft IP) offers low round-trip latency, and an efficient resource footprint.
- Ethernet
-
Low Latency Ethernet 100G MAC and PHY Intel® FPGA IP Core
Altera• HQ: USAIntel® offers ultimate flexibility, scalability, and configurability with the Low Latency 100G Ethernet Intel® FPGA IP core targe…
- Single-Protocol PHY
-
Altera• HQ: USA
The JEDEC committee created the JESD204 data converter serial interface standard to standardize and reduce the number of data inp…
- JESD204
-
Altera• HQ: USA
The Interlaken Intel® FPGA IP core is Interlaken Protocol Definition v1.2 compliant and allows system developers to achieve high …
- Interlaken
-
Interlaken Look-Aside Intel® FPGA IP
Altera• HQ: USAInterlaken Look-Aside is a scalable protocol that allows interoperability between a datapath device and a look-aside coprocessor …
- Interlaken
-
Altera• HQ: USA
The enhanced Common Public Radio Interface (eCPRI) Altera® FPGA IP core implements the eCPRI specification version 2.0.
- CPRI
-
Compute Express Link (CXL) FPGA IP
Altera• HQ: USAIndustry's first FPGA-based hardened CXL IP solution for Type 1, 2, and 3 devices.
- CXL
-
Altera• HQ: USA
The Common Public Radio Interface (CPRI) Altera® FPGA IP core implements the CPRI Specification V7.0.
- CPRI
-
Backplane Ethernet 10GBASE-KR PHY Intel® FPGA IP Core
Altera• HQ: USAThe Backplane Ethernet 10GBASE-KR PHY Intel® FPGA Intellectual Property (IP) core is a transceiver PHY that allows you to instant…
- Single-Protocol PHY
-
Intel® Agilex™ 7 F-Tile Ethernet Hard IP
Altera• HQ: USAThe Intel® Agilex™ 7 FPGA F-Tile incorporates a fracturable, configurable, hardened Ethernet protocol stack for supporting rates …
- Ethernet
-
Intel® Agilex™ 7 and Intel® Stratix® 10 FPGA E-Tile Hard IP
Altera• HQ: USAThe Intel® Agilex™ 7 and Intel® Stratix® 10 FPGA E-Tile incorporates a configurable, hardened Ethernet protocol stack compatible …
- Multi-Protocol PHY