Vendor: Altera Category: Video Processing

Tone Mapping Operator (TMO) Intel® FPGA IP

As a part of the Video and Vision Processing (VVP) Suite Intel® FPGA IP, the Tone Mapping Operator (TMO) Intel® FPGA IP corrects …

Overview

As a part of the Video and Vision Processing (VVP) Suite Intel® FPGA IP, the Tone Mapping Operator (TMO) Intel® FPGA IP corrects poorly exposed images and video to reveal invisible details.

TMO Intel® FPGA IP Improves the Video Quality and Viewing Experience in a Wide Variety of Applications by:

  • Applying intelligent, content-aware local tone mapping.
  • Statistically analyzing the image luminance both locally and globally.
  • Enhancing underexposed and overexposed imagery to utilize all available dynamic range without metadata.
  • Dynamically adjusting image components to improve overall image contrast.
  • Utilizing industry-standard interfaces to ease the integration into your FPGA design.
  • Minimizing resource utilization compared to competing products, enabling a more cost-effective solution.

Key features

  • Multi-tile local image statistics analysis.
  • Support for 8, 10 and 12 bit per color component.
  • Support up to 4 pixels in parallel (PIP) per clock processing.
  • Low subframe latency (~ 100 clock cycles).
  • Support resolutions up to 4K at 60 fps on Intel® Cyclone® 10 FPGAs, Intel® Arria® 10 FPGAs, Intel® Stratix® 10 FPGAs, and Intel Agilex® 5 FPGA E-Series.
  • Support resolutions up to 8K at 60 fps on Intel Agilex® 7 FPGAs and on Intel Agilex® 5 FPGA D-Series.
  • AXI4-Stream video I/O interface.
  • AXI4-Stream ↔ Avalon® streaming interface protocol converters.
  • Avalon® memory-mapped CPU control and memory interfaces.
  • Low resource utilization for edge applications.
  • Free Intel® FPGA IP Evaluation Mode.
  • Design example available.

Block Diagram

Specifications

Identity

Part Number
Tone Mapping Operator (TMO) Intel® FPGA IP
Vendor
Altera
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: USA

Learn more about Video Processing IP core

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FPGAs with variable-precision DSP block architecture are the only programmable devices that can efficiently support many different precision levels including floating-point implementations. This DSP architecture enables the next-generation of high-precision and high-performance signal processing applications.

Debugging FPGA-based video systems: Part 2

In Part 2 of this series from Digital Video Processing For Engineers, Andrew Draper describes some of the strategies for debugging an FPGA-based video system to be sure it reliably delivers the necessary video streams in real time. Part 2: Clocked and flow controlled video streams.

Frequently asked questions about Video Processing IP

What is Tone Mapping Operator (TMO) Intel® FPGA IP?

Tone Mapping Operator (TMO) Intel® FPGA IP is a Video Processing IP core from Altera listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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