Reed-Solomon Compiler IP Core
The Reed-Solomon (RS) compiler offers a fully parameterizable RS coder and RS decoder.
Overview
The Reed-Solomon (RS) compiler offers a fully parameterizable RS coder and RS decoder. RS coder/decoders (CODECs) are widely used for error detection and correction in a wide range of digital signal processing (DSP) applications for storage, retrieval, and transmission of data.
Notice: The Reed-Solomon IP Core is now under obsolescence. For more details, refer to the product discontinuance notice, PDN1410.
Key features
- The RS compiler has the following options:
- Erasures-supporting option—the RS decoder can correct symbol errors up to the number of check symbols, if you give the location of the errors to the decoder
- Variable encoding or decoding—you can vary the total number of symbols per codeword and the number of check symbols, in real time, from their minimum allowable values up to their selected values, when you are encoding or decoding
- Error symbol output—the RS decoder finds the error values and location and adds these values in the Galois field to the input value
- Bit-error output—either split count or full count
- The RS compiler generates a fully parameterizable RS function, allowing you to set the following parameters:
- Number of bits per symbol
- Number of symbols per codeword
- Number of check symbols per codeword
- Field polynomial
- First root of generator polynomial
- Space between roots in generator polynomial
- The RS function offers the following other features:
- Decoder features:
- Variable option
- Erasures-supporting option
- Encoder features variable architectures
- Support for shortened codewords
- Conforms to Consultative Committee for Space Data Systems (CCSDS) Recommendations for Telemetry Channel Coding, May 1999
- Intellectual property (IP) functional simulation models for use in Intel® FPGA-supported VHDL and Verilog HDL simulators
- Easy-to-use IP Toolbench interface:
- Generates parameterized encoder or decoder
- Generates customized testbench and customized Tcl script
- DSP Builder for Intel® FPGAs ready
- Decoder features:
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Channel Coding IP cores
What is Reed-Solomon Compiler IP Core?
Reed-Solomon Compiler IP Core is a Channel Coding IP core from Altera listed on Semi IP Hub.
How should engineers evaluate this Channel Coding?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.