High-Speed Reed Solomon Intel® FPGA IP Core
The High-Speed Reed Solomon Intel® FPGA intellectual property (IP) core uses a large parallel architecture to achieve a large thr…
Overview
The High-Speed Reed Solomon Intel® FPGA intellectual property (IP) core uses a large parallel architecture to achieve a large throughput for applications that require 100 Gbps. The IP core is suitable for 10G (such as OTN) or 100G Ethernet (IEEE 802.3bj/bm) applications.
Key features
- Fully parameterizable:
- Number of bits per symbol
- Number of symbols per codeword
- Number of check symbols per codeword
- Field polynomial
- Avalon® Streaming (Avalon-ST) interfaces
- Testbenches to verify the IP core
- IP functional simulation models for use in Intel FPGA-supported VHDL and Verilog HDL simulators
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Channel Coding IP cores
What is High-Speed Reed Solomon Intel® FPGA IP Core?
High-Speed Reed Solomon Intel® FPGA IP Core is a Channel Coding IP core from Altera listed on Semi IP Hub.
How should engineers evaluate this Channel Coding?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.