FFT Intel® FPGA IP Core
The Fast Fourier transform (FFT) Intel FPGA intellectual property (IP) core is a high-performance, parameterizable FFT processor.
Overview
The Fast Fourier transform (FFT) Intel FPGA intellectual property (IP) core is a high-performance, highly parameterizable FFT processor. The FFT function implements a radix-2/4 decimation-in-frequency (DIF) FFT algorithm for transform lengths of 2m where 6 ≤ m ≤ 14, internally using a block-floating-point architecture to maximize signal dynamic range in the transform calculation.
What's New in v18.1:
The FFT Intel FPGA IP core accepts, as input, a complex data vector of length N (in two’s complement format) and outputs the transform-domain complex vector in natural order. An accumulated block exponent is output to indicate any data scaling that has occurred during the transform to maintain precision and maximize the internal signal-to-noise ratio. Transform direction is specifiable on a per-block basis via an input port.
What's New in v18.1:
The FFT Intel FPGA IP core accepts, as input, a complex data vector of length N (in two’s complement format) and outputs the transform-domain complex vector in natural order. An accumulated block exponent is output to indicate any data scaling that has occurred during the transform to maintain precision and maximize the internal signal-to-noise ratio. Transform direction is specifiable on a per-block basis via an input port.
Features
The FFT Intel FPGA IP core has the following options:
- Radix-4 and mixed radix-2/4 implementations
- Variable transform length
- Block floating-point architecture—maximizes internal signal dynamic range
- Use of internal memory
The FFT Intel FPGA IP core also:
- Is optimized to use digital signal processing (DSP) blocks and TriMatrix memory architecture
- Uses embedded multipliers
- Has intellectual property (IP) functional simulation models for use in Intel FPGA supported VHDL and Verilog HDL simulators
Key features
- Radix-4 and mixed radix-2/4 implementations
- Variable transform length
- Block floating-point architecture—maximizes internal signal dynamic range
- Use of internal memory
- Is optimized to use digital signal processing (DSP) blocks and TriMatrix memory architecture
- Uses embedded multipliers
- Has intellectual property (IP) functional simulation models for use in Intel FPGA supported VHDL and Verilog HDL simulators
Specifications
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Provider
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Frequently asked questions about Filters and Transforms IP cores
What is FFT Intel® FPGA IP Core?
FFT Intel® FPGA IP Core is a Filters Transforms IP core from Altera listed on Semi IP Hub.
How should engineers evaluate this Filters Transforms?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Filters Transforms IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.