The USB2.0 function controller is a integrated USB solution for USB applications.
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Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
The USB2.0 function controller is a integrated USB solution for USB applications.
IEEE 1394a - 2000 Link Layer Controller
The Link core is a functional block available for insertion into a customer's ASIC design, which supports the IEEE 1394a - 2000 D…
The USB 2.0 Hub core is designed for flexibility and ease of use and is technology independent.
USB 2.0 Host Controller (EHCI)
The USB 2.0 Host controller is designed for flexibility and ease of use and facilitates implementation of a wide variety of appli…
SMTPE-292 Scrambler & Descrambler / Framer
The SMPTE292 core set, coupled with the AMCC S8401/S8501 serializer/deserializer chipset is fully compliant to the SMPTE 292M spe…
Integrates MAC IP to a broad range of PHY and SerDes IP
The silicon proven USB host controller is compliant with USB 1.1 and OHCI 1.0 Specifications.
The USB 2.0 soft core facilitates data transmission up to 480 Mbps and is ideally suited for high-speed devices like CD-Rom drive…
CAN 2.0 B Compatible Network Controller
The logiCAN core provides all features expected from the standard CAN network controller.
Universal Asynchronous Receiver / Transmitter
The macro M16550, implements a synchronous universal asynchronous receiver/transmitter, which provides an interface between a mic…
Verification IP for MIPI SoundWire
Achieves rapid verification closure of MIPI SoundWire devices operating with Basic and High-PHY links
Fully compliant with UCIe v3.0 specification (August 2025); backward compatible with UCIe v2.0, v1.1, and v1.0
SmartDV’s UCIe 2.x Controller IP is a silicon-proven, fully featured Universal Chiplet Interconnect Express solution purpose-built for SoC and multi-die system designs r…
Time-Sensitive Networking (TSN) End Point DO-254 IP Core
Compliant with IEEE 802.1DP-2025 Synchronous Type 2 End Station requirements
Mesochronous Bridge for PCIe/CXL
Timing-Agnostic PCIe/CXL Bridge for Prototyping & Emulation
Fully compliant with OpenGMSL v3.0
Fully compliant with OpenGMSL v3.0 specification (March 2026)
Protocol-Neutral Custom Fabric
Flexible, software-defined fabric IP for custom protocols, AI workloads, and chiplet-scale systems.
Configurable Cache Coherent Fabric IP
Scalable Coherent Connectivity for Advanced SoCs and Chiplet Systems
Configurable AMBA Non-Coherent Fabric IP
Flexible, High-Performance Connectivity for SoCs and Chiplet Systems Modern SoCs and chiplet-based systems require flexible, high-performance fabrics that can efficientl…