OpenGMSL Verification IP

SmartDV’s OpenGMSL Verification IP is a comprehensive solution for verifying high-speed serializer/deserializer (SerDes) connectivity for automotive video and sensor data applications. Fully compliant with OpenGMSL v3.0, it supports full-duplex transmission of unidirectional video and sensor streams alongside bidirectional data streams for Ethernet, SPI, I2C, UART, I2S/TDM audio, and GPIO, across all supported link topologies and forward link rates up to 12 Gbps.

SmartDV’s OpenGMSL VIP supports UVM, SystemVerilog, and Verilog, and integrates seamlessly into diverse verification environments. It is simulator-independent and compatible with all leading EDA simulators, providing flexibility across simulation platforms.

With support for all OpenGMSL link topologies, multiple forward link rates, FEC encoding, HDCP content protection, functional safety mechanisms, complete FTSR and STFR functionality, and a full test suite, SmartDV’s OpenGMSL VIP enables verification teams to thoroughly validate automotive SerDes designs for ADAS, autonomous driving, and in-cabin infotainment applications.

Compliance and Compatibility

• Fully compliant with OpenGMSL v3.0
• Supports HDCP 1.4 and HDCP 2.3 content protection
• Compatible with UVM, OVM, VMM, SystemVerilog, and Verilog verification environments
• Compatible with all major EDA simulators including Synopsys VCS, Cadence Xcelium, Siemens Questa, Aldec Riviera-PRO, and Verilator

• Full FTSR and STFR Functionality – Supports complete Forward Transport Stream Router and Stream Transport Frame Router operation, enabling thorough verification of all OpenGMSL data routing and transport mechanisms.
• Comprehensive Link Topology Support – Verifies Single Link, Splitter, Aggregation, Daisy-Chain, and Multiple Link topologies between pairs of nodes, covering the full range of automotive multi-device connectivity configurations.
• Multi-Stream Full-Duplex Transmission – Supports simultaneous full-duplex transmission of unidirectional video and sensor streams alongside bidirectional Ethernet, SPI, I2C, UART, I2S/TDM audio, and GPIO data streams over a single link.
• Flexible Link Rate and PHY Support – Covers all OpenGMSL forward link rates including 3 Gbps (Link Rate 1), 6 Gbps (Link Rate 2 NRZ and Link Rate 3 PAM4), and 12 Gbps (Link Rate 4), with 187.5 Mbps reverse direction support, asynchronous and synchronous clocking modes, and Reference over Reverse clocking architecture.
• Robust Encoding and Error Correction – Supports 9b/10b encoding and decoding, scrambler and descrambler operation, and FEC encoding and decoding using Reed-Solomon for reliable high-speed data integrity verification.
• Content Protection and Security Verification – Verifies HDCP 1.4 and HDCP 2.3 encryption and decryption for video and audio streams, ensuring compliance with content protection requirements across all link configurations.
• Functional Safety and Low Power Verification – Supports verification of functional safety (FuSa) mechanisms, low power state transitions including Sleep and Standby modes, compressed video stream transport, and Infoframe message exchange.
• Complete Verification Infrastructure – Provides a full test suite covering every OpenGMSL specification feature, functional coverage analysis, status counters for bus events, and callbacks in node transmitter, receiver, and monitor for user-defined data processing and protocol violation notification.