USB2.0 - Function Controller

The USB2.0 function controller is a highly integrated USB solution for USB applications. It simplifies the design of the USB systems and reduces the time to market. The SI16USB20 is a USB Function controller core designed as per USB2.0 revision of USB standards. This core provides 480Mb / s high speed USB interface. It autonomously handles the USB transactions and data transfers, thus bridging the USB interface to an easy read/write parallel interface. It has the standard UTMI interface at host end and a generic microcontroller interface at the device end. It is a is single core solution incorporating USB2.0 protocol operating in Link Layer of Open System Interconnect (OSI) which significantly reduces the time and cost of implementing complex USB2.0 target system designs.

The Universal Serial Bus (USB) has evolved to the standard interconnect between computers and peripherals. Everything from a mouse to a camera can be connected via USB. With the new USB 2.0 specification, data rates of over 480Mb / s are possible.

The Universal Serial Bus is a point-to-point interface. Multiple peripherals are attached through a HUB to the host.

The rapidly increasing demand for higher interconnection bandwidth is surpassing the performance capacity of existing interconnects devices. USB2.0 is an open architecture that improves data throughput and allows to connect max 127 devices to a single port residing on the PC. USB is a serial protocol and physical link, which transmits all data differentially on a single pair of wires. Another pair provides power to downstream peripherals.

The Universal Serial Bus (USB) was born out of the frustration of PC users experience trying to connect an incredibly diverse range of peripherals to their computers. It's the child of vendors whose laptops require a small profile peripheral connector. It further promises to reduce the proliferation of cables and wall transformers that overwhelm even the smallest computer installation. USB is supplanting old - fashioned parallel and serial interfaces in all sorts of applications.

Product Specifications :

• Fully synthesizable Register Transfer Level (RTL) Verilog HDL core.
• Test Bench. (Environment Variable : Verilog)
• Targeted to Xilinx FPGA
• Clock Frequency : 79.1MHz for FPGA (Standard : 60 MHz)
• Standard IO

Product Options :

• Adaptations : 8 Bit 8051 Microcontroller Interface possible.
• 16 Bit Standard Microcontroller Interface possible.
• AMBA possible.
• Add - ons : Verification IP in OVA (Open Vera Assertion) available.

• Fully compliant with USB2.0 specifications as provided by USB Organisation.
• Compliance to Test Suites as provided by USB Organisation.
• Supports High Speed (480 Mbps) Devices.
• Backward Compatible to USB v1.1 and v1.0
• Supports Full Speed (12 Mbps) Devices.
• Supports Low Speed (1.5 Mbps) Devices.
• Includes Packet Assembler, Packet Disassembler and a Protocol Engine in Protocol Layer.
• Supports Bulk, Interrupt and Isochronous type transfers.
• Support for control transfers by endpoint zero.
• Automatic data retry mechanism.
• Highly intelligent remote wake - up function.
• In system Endpoint FIFO - 1 In FIFO or EPIN, 1 Out FIFO or EPOUT and 1 Control FIFO or EPO.
• EPIN and/or EPOUT may be considered as Bulk or Isochronous or Interrupt Endpoint.
  • Endpoint Buffers are Integrated 4Kbytes on chip data buffer.
• Endpoints are 8 Bit wide.
• No Gated Clocks.
• Support for UTMI v1.03 (USB Transceiver Macro Cell Interface).
• Generic 8 Bit Microcontroller Interface.
• Supports 2 Clock Domains; 1 from UTMI and 1 from Microcontroller

• Fully synthesizable Register Transfer Level (RTL) Verilog HDL core.
• Test Bench. (Environment Variable: Verilog)