Multi-channel DVB-C / J83 FEC encoder
The CMS0044 J.83abc/DVB-C Cable FEC Encoder combines all of the channel coding and Forward Error Correction functions specified b…
- Channel Coding
Channel Coding IP cores accelerate forward error correction and coding functions in communication systems in modern SoC and ASIC designs.
These IP cores implement coding and decoding primitives used to improve reliability over noisy channels in wireless, wired, and storage applications
This catalog allows you to compare Channel Coding IP cores from leading vendors based on coding throughput, latency, supported code families, and process node compatibility.
Whether you are designing wireless baseband, satellite links, storage systems, or network infrastructure, you can find the right Channel Coding IP for your application.
Multi-channel DVB-C / J83 FEC encoder
The CMS0044 J.83abc/DVB-C Cable FEC Encoder combines all of the channel coding and Forward Error Correction functions specified b…
The CMS0077 Satellite FEC Decoder has been designed specifically to meet the requirements of the DVB-S2 and DVB-S2X wide-band dig…
The Viterbi Intel FPGA IP core generates high-performance, soft-decision Viterbi intellectual property (IP) functions that implem…
Forward-error correction (FEC) channel codes commonly improve the energy efficiency of wireless communication systems.
Reed Solomon II Intel® FPGA IP Core
The Reed Solomon II Intel® FPGA intellectual property (IP) core offers a fully parameterizable Reed Solomon encoder and decoder.
The Reed-Solomon (RS) compiler offers a fully parameterizable RS coder and RS decoder.
High-Speed Reed Solomon Intel® FPGA IP Core
The High-Speed Reed Solomon Intel® FPGA intellectual property (IP) core uses a large parallel architecture to achieve a large thr…
The Bose, Chaudhuri, and Hocquenghem (BCH) error correction intellectual property (IP) core is typically used in NAND flash appli…
The 5G Polar Intel® FPGA IP implements a forward error correction (FEC) encoder and decoder based on polar codes compliant with t…
Low-density parity-check (LDPC) codes are linear error correcting codes that help you to transmit and receive messages over noisy…
Error Correcting Code for SRAMs
The ECC-SRAM core adds protection against SRAM data corruption.
BCH Encoder and Decoder IP Core
The IP Core implements BCH Code encoding and decoding.
CCSDS AR4JA LDPC
Polar Encoder / Decoder for 5G NR control channels
AccelerComm's Polar IP delivers the 3GPP-compliant encoding and decoding chain for 5G NR control channels.
LDPC Encoder / Decoder for 5G and 6G NTN PHY
High-performance Forward Error Correction IP for 5G and 6G NTN PHY.
LTE Release-10 Baseband PHY. (L1) IP
This is a 3GPP Release 10 compliant LTE eNodeB PHY IP, which is a Macro cell LTE available for commercial deployment of LTE Netwo…
Narrow band - IoT Release-14 e-NodeB PHY. (L1) IP
This LTE UE Reference design is a Category NB UE.
FSK Demodulator,BCH Decoder,Command Decoder,Validator,Convolution Encoder IPs
A lot of development for implementing communication subsystem for a student nano-satellite was also undertaken.
Soft-Decision FEC Integrated Block
For many current and emerging high data rate applications such as 4G, 5G and DOCSIS3.1 Cable Access, transmission reliability is …
The Polar Encoder/Decoder soft IP core supports Polar encoding and decoding.