TC1620 is a high performance turbo decdoer Core compliant with DVB-RCS2 specifications.
- Channel Coding
- field proven
Channel Coding IP cores accelerate forward error correction and coding functions in communication systems in modern SoC and ASIC designs.
These IP cores implement coding and decoding primitives used to improve reliability over noisy channels in wireless, wired, and storage applications
This catalog allows you to compare Channel Coding IP cores from leading vendors based on coding throughput, latency, supported code families, and process node compatibility.
Whether you are designing wireless baseband, satellite links, storage systems, or network infrastructure, you can find the right Channel Coding IP for your application.
TC1620 is a high performance turbo decdoer Core compliant with DVB-RCS2 specifications.
Gigabit-range, low complexity LDPC decoder
TC4902 is ideally suited for applications requiring a very efficient throughput/area ratio, while not sacrificing SNR performance.
Error Correction Checking (ECC) Core
The Xilinx LogiCORE™ IP ECC core is ideal for robust data transmission with error correction and checking capabilities.
Xilinx provides a generic forward error correction (FEC) engine to generate and insert a SMPTE ST2022 compliant video over IP FEC…
The Backhaul Low Density Parity Check (LDPC) core IP provides a high-performance forward error correction (FEC) solution for mobi…
Flash Memory LDPC Error Correction
The Xilinx® LogiCORE™ IP Flash Memory low-density parity-check (LDPC) Error Correction core is a major component for improving fl…
LDPC Decoder and Encoder that supports DVB-S2 DVB-S2X DVB-T2 DVB-C2 CMMB DMB-T
LDPC Decoder and Encoder that supports DVB-S2 DVB-S2X DVB-T2 DVB-C2 CMMB DMB-T
The 3GPP Mixed Mode Turbo Decoder provides a flexible turbo convolutional decode function for both LTE and UMTS air interfaces.
The LTE PUCCH Receiver LogiCORE™ IP core provides the receive functionality required for the LTE Physical Uplink Control CHannel …
The 3GPP LTE Channel Estimator LogiCORE™ IP provides an optimized channel estimation function for the Physical Uplink Shared Chan…
The 3GPP LTE Turbo Encoder implements the turbo convolutional encoding scheme defined in the 3GPP LTE specifications.
The 3GPP LTE RACH Detector offers a flexible and optimized implementation of the RACH detection function required for 3GPP-LTE ba…
Free LogiCORE™ IP design enabling the use of multi-gigabit transceivers for Xilinx FPGA.
The LTE Baseband Platform enables customers to more easily exploit the advantages of a 100% Xilinx FPGA baseband implementation, …
The LTE MIMO Decoder provides LTE basestations developers with a optimized and scalable MIMO decode function.
China Multimedia Mobile Broadcasting (CMMB) LDPC decoder
TC4300 is a LDPC decoder designed for China Multimedia Mobile Broadcasting (CMMB) specifications.
The 3GPP LTE Channel Encoder performs the 'outer' transmit functions for the Physical Downlink Shared (PDSCH), Multicast (PMCH), …
The 3GPP LTE Channel Decoder provides a high-performance, optimized decode function for the Uplink Shared Channel (UL-SCH), as de…
IEEE 802.15.3c Irregular LDPC(672,336), LDPC(672,504), LDPC(672,588) encoder and decoder
IEEE802.15.3c irregular LDPC(672,336), LDPC(672,504), LDPC(672,588) encoder and decoder.
China Multimedia Mobile Broadcasting (CMMB) LDPC decoder, implemented with Continuous bits’ LDPC-decoder architecture.