1KB/ECC96 NAND Flash BCH Encoder/Decoder
The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission.
- Channel Coding
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Channel Coding IP cores accelerate forward error correction and coding functions in communication systems in modern SoC and ASIC designs.
These IP cores implement coding and decoding primitives used to improve reliability over noisy channels in wireless, wired, and storage applications
This catalog allows you to compare Channel Coding IP cores from leading vendors based on coding throughput, latency, supported code families, and process node compatibility.
Whether you are designing wireless baseband, satellite links, storage systems, or network infrastructure, you can find the right Channel Coding IP for your application.
1KB/ECC96 NAND Flash BCH Encoder/Decoder
The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission.
ITU-Ghn LDPC Encoder / Decoder
TC4400 is a LDPC decoder core that is fully compliant with ITU G.hn (wireline home networking) specifications.
512B/ECC16 Nand Flash BCH Encoder/Decoder
The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission.
1KB/ECC40 NAND Flash BCH Encoder/Decoder
The BCH encoder/decoder provides error correction code (ECC) capabilities for applications such as data storage and transmission.
Highly Integrated Reed Solomon Codec
ntRSC_IESS core is a integrated solution implementing a time-domain Reed-Solomon Forward Error Correction algorithm.
The TC4500 Core complies with DVB-T2 specifications.
TC1700 is a FEC receiver adressing LTE, LTE-A, WiMAX, HSPA/+, and legacy 3G standard.
3GPP LTE 3GPP2 1xEV-DO Turbo Decoder with Ping Pong Input and Output Memories
This is a fully compatible 3GPPTM LTE and 3GPP2 1xEV-DO Release B turbo decoder with ping-pong input and output memories.
DVB-RCS and WiMAX Turbo Decoder with Optional Viterbi Decoder
This is a fully compatible DVB-RCS and IEEE 802.16 WiMAX error control decoder.
The CMS0008 Viterbi Decoder core implements Viterbi’s algorithm for maximum likelihood decoding of non-feedback convolutional cod…
TC6000 is a CCSDS turbo decoder.
TC4000 is fully compliant with DVB-S2 and DVB-S2X specifications, covering modulations up to 256APSK.
64/256 state block Viterbi decoder
The VA08S is a low complexity 64 or 256 state error control decoder using the maximum likelihood Viterbi algorithm.
The BCH design includes two independent units, an encoder for generation of the BCH code, and decoder for the BCH code decoding.
High Speed CCSDS Turbo Decoder with Optional Viterbi Decoder
This is a CCSDS compatible 16 state error control turbo decoder.
IEEE 802.16 WirelessMAN OFDM Channel Codec
The CMS0005 802.16 Channel Codec provides all of the functionality necessary to implement the back end data processing in an 802.…
High Speed Inmarsat Compatible Turbo Decoder
This is an Inmarsat compatible 16 state error control turbo decoder.
The CMS0002 Viterbi Decoder core implements Viterbi’s algorithm for maximum likelihood decoding of non-feedback convolutional cod…
The VA08V is a low complexity 16, 32, 64 or 256 state error control decoder using the maximum likelihood Viterbi algorithm.
softDSP released 3GPP compliant Turbo decoder IP core in May, 2000.