Mobiveil’s ONFI/Toggle IP is a flexible and configurable design targeted for enterprise storage applications like SSD.
- Controller
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Mobiveil’s ONFI/Toggle IP is a flexible and configurable design targeted for enterprise storage applications like SSD.
The TSMC 2nm 1.2V GPIO offers configurable I/O functionality with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes.
Optimized for 3D Wafer-on-Wafer (WoW) integration, the controller supports ultra-wide interface.
Fully compliant to SWI3S Specification version 1.0
4/8-bit mixed-precision NPU IP
Features a optimized network model compiler that reduces DRAM traffic from intermediate activation data by grouped layer partitio…
SMC 2nm 1V8 ESD Power Clamp – Low Leakage
Silicon-proven ESD protection for GAA/nanosheet technologies
TSMC 2nm 1V8 ESD Local Clamp – Low Leakage
Silicon-proven ESD protection for GAA/nanosheet technologies
The modulation and spreading functions for the O-QPSK PHYs are processed through 3 steps.
High-performance, deterministic hardware IP for real-time signal processing, control algorithms, and embedded AI acceleration.
AMBA SPI Controller MRAM Controller
SPI Master Memory Controller IP core purpose-built for the Avalanche Technology AS30xG208 / ASAS308G208 family
Sofics specialty I/Os offer configurable GPIOs with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes.
Highly flexible, low-latency, multiport TSN Ethernet switch
256 bit per clock LZ4 Decompressor Core
Ultra low-Latency Single-Engine Decompressor Core
Adaptive Voltage Scaling (AVS) Bus Target IP
Provides full AVS Bus slave functionality compliant with the AVS Bus specification.
Adaptive Voltage Scaling (AVS) Bus Host Controller
Designed to enable efficient, high-speed communication between the SoC processor subsystem and external voltage regulators through the industry-standard AVS Bus protocol.
Multi-Protocol AMBA Support - Advanced Routing & Arbitration - Virtual Channel Deadlock Avoidance - Unlimited Scaling
XTAL oscillator family available in TSMC : 7, 12, 28, 65, 130nm
Fully compliant with V-by-One HS / HS Plus THine Specification.
Ultra-low jitter, high SFDR LC-based PLL-12.5GHz
Ultra-low jitter, high SFDR LC-based PLL-12.5GHz for SerDes
Resolution: up to 16Kx16K, RGB/YUV (8-bit), Distortion correction (any-shape transform), scaling, rotation