Vendor: Sofics Category: GPIO

TSMC 2nm 1V2 GPIO

The TSMC 2nm 1.2V GPIO offers configurable I/O functionality with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes.

TSMC 2nm N2P Available on request View all specifications

Overview

This TSMC 2nm 1.2V GPIO IP provides configurable, overvoltage-tolerant I/O functionality for advanced-node designs. The IP macro is designed in TSMC 2nm and can be ported to other technologies upon request using Sofics in-house design tool flow.

The TSMC 2nm 1.2V GPIO offers configurable I/O functionality with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes. Designed for advanced nodes, it enables reliable interfacing between low-voltage cores and higher-voltage or legacy systems.

An integrated voltage regulator can be added to ensure stable operation across wide voltage ranges for auxiliary supply domains, supporting multi-voltage and OVT functionality without external components.

Details

Parameter Value
VDD 0.75V ±10%
VDDIO 1.2V ±10%
Temperature Tj -40C to 85C

Key Features

Parameter Value
Maximum bit rate 100 MHz
Drive strength 5mA (other options available)
ESD robustness >1kV HBM

Area

Type Size [μm²]
I/O 2500

 

Key features

  • Overvoltage tolerant design
  • Supports multiple supply voltages
  • Input enable/disable
  • Tri-state output
  • Optional Pull select
  • Pullup/Pulldown
  • Compatible with TSMC I/O ring
  • Integrated voltage regulator
  • Other analog features such as I2C, I3C, SPI, UART, JTAG, PWM, WDT, slew rate control, fail-safe, drive strength options and more

Block Diagram

Benefits

  • Broad portfolio of IO configurations from a single base architecture
  • Modular design enables fast and reliable turnaround and low NRE
  • Proven across multiple advanced nodes
  • Optimized for performance, power, and area trade-offs

Silicon Options

Foundry Node Process Maturity
TSMC 2nm N2P Available on request

Specifications

Identity

Part Number
DS-TS2N-1V2-GPIO
Vendor
Sofics
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Belgium

Learn more about GPIO IP core

GPIO Solutions for CERN’s Radiation-Hardened Applications

For over a decade, Sofics has collaborated with CERN, the European Organization for Nuclear Research. Sofics has delivered advanced GPIO cells tailored for radiation-hardened applications, supporting CERN’s groundbreaking particle physics experiments.

Ensuring reliability in Advanced IC design

To complete our task as engineers we rely on the tools we use. We collaborated with Siemens EDA solutions back in 2025 on a webinar about how we use their tools to develop our designs and layouts.

Not all overvoltage tolerant GPIOs are the same

Most foundries provide GPIO libraries to their fabless customers. These libraries contain different elements like supply/ground pads, analog I/Os, digital I/Os, corner cells, filler cells, power-on-reset circuits. Frequently the foundry includes cells for different voltage domains. In 40nm CMOS the IC designer can use cells for 1.8V, 2.5V and 3.3V for instance.

Frequently asked questions about GPIO Pad Library IP cores

What is TSMC 2nm 1V2 GPIO?

TSMC 2nm 1V2 GPIO is a GPIO IP core from Sofics listed on Semi IP Hub. It is listed with support for tsmc Available on request.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP