Vendor: Sofics Category: GPIO

TSMC 4nm 3V3 GPIO

Sofics specialty I/Os offer configurable GPIOs with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes.

Contact Provider Request Datasheet
TSMC 4nm N4AE Available on request View all specifications

Overview

This specific IP macro is designed in TSMC 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow.

Sofics specialty I/Os offer configurable GPIOs with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes. Designed for advanced nodes, they enable reliable interfacing between low-voltage cores and higher-voltage or legacy systems.

An integrated voltage regulator ensures stable operation across wide voltage ranges, for auxiliary supply domains, supporting multi-voltage and OVT functionality without external components.

Details

Parameter Value
VDD 0.75V ±10%
VDDIO 3.3V ±10%
Temperature Tj -40C to 125C

Key Features

Parameter Value
Maximum bit rate 110Mbaud/s @ 5pF
Power consumption < 5uW
Drive strength 5mA (other options available)
ESD robustness 2kV HBM | 500V CDM

Area

Type Size [μm²]
I/O 8000 – 10000

Key features

  • Overvoltage tolerant design
  • Supports multiple supply voltages
  • Input enable/disable
  • Tri-state output
  • Pull select | Pullup/Pulldown
  • Compatible with TSMC I/O ring
  • Integrated voltage regulator
  • Other analog features such as I2C, I3C, SPI, UART, JTAG, PWM, WDT, slew rate control, fail-safe, drive strength options and more

Block Diagram

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Benefits

  • Broad portfolio of IO configurations from a single base architecture
  • Modular design enables fast and reliable turnaround and low NRE
  • Proven across multiple advanced nodes
  • Optimized for performance, power, and area trade-offs

Silicon Options

Foundry Node Process Maturity
TSMC 4nm N4AE Available on request

Specifications

Identity

Part Number
DS-TS4N-3V3-GPIO
Vendor
Sofics
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Sofics
HQ: Belgium
Contact Sofics

Learn more about GPIO IP core

GPIO Solutions for CERN’s Radiation-Hardened Applications

For over a decade, Sofics has collaborated with CERN, the European Organization for Nuclear Research. Sofics has delivered advanced GPIO cells tailored for radiation-hardened applications, supporting CERN’s groundbreaking particle physics experiments.

Ensuring reliability in Advanced IC design

To complete our task as engineers we rely on the tools we use. We collaborated with Siemens EDA solutions back in 2025 on a webinar about how we use their tools to develop our designs and layouts.

Not all overvoltage tolerant GPIOs are the same

Most foundries provide GPIO libraries to their fabless customers. These libraries contain different elements like supply/ground pads, analog I/Os, digital I/Os, corner cells, filler cells, power-on-reset circuits. Frequently the foundry includes cells for different voltage domains. In 40nm CMOS the IC designer can use cells for 1.8V, 2.5V and 3.3V for instance.

Frequently asked questions about GPIO Pad Library IP cores

What is TSMC 4nm 3V3 GPIO?

TSMC 4nm 3V3 GPIO is a GPIO IP core from Sofics listed on Semi IP Hub. It is listed with support for tsmc Available on request.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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