DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps.
- Controller + PHY + 1
- LPDDR4
- TSMC
- 28nm
- HPC+
- In Production
Memory interface IP cores provide the critical connectivity layer between processing elements and memory devices, enabling high-bandwidth, low-latency, and power-efficient data access in modern SoC, ASIC, AI, networking, and high-performance computing designs.
This category includes DDR, LPDDR, GDDR, HBM, NAND Flash, and NOR Flash interface IP solutions, covering memory controllers, PHYs, controller-PHY subsystems, training engines, calibration logic, and complete memory interface architectures. These IP cores are designed to maximize memory bandwidth, optimize latency, ensure signal integrity, and simplify integration across advanced semiconductor process nodes.
DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)
The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps.
DDR4/ LPDDR4/ DDR3L PHY IP - 3200Mbps (Silicon Proven in TSMC 12FFC)
The DDR4/ DDR3L/ LPDDR4 Combo PHY IP provides low latency and enables up to 3200Mbps throughput.
GDDR6X/6 Combo PHY & Controller
The GDDR6X/6 PHY is fully compliant with the JEDEC GDDR6X/6 standard, supporting data rates of up to 20Gbps per pin for PAM2 GDDR…
Features a mixed-signal architecture that addresses the challenges of DRAM integration in high-performance and low-power environm…
DDR3L/ LPDDR4/ DDR4 PHY IP - 1866Mbps (Silicon Proven in UMC 28HPC+)
The DDR3L/ DDR4/ LPDDR4 Combo PHY IP offers low latency and supports throughput of up to 1866Mbps.
LPDDR4/3 provides very intense presentation via memory controller design based on proprietary out-of-order scheduling algorithm a…
Delivers excellent performance in addition to high utilization and ultra-low latency, achieved by its proprietary out-of-scheduli…
The LPDDR2/3_DDR3/4 libraries contain the 7-way combo driver/receiver cells with embedded power cells, the driver impedance calib…
Avalon Mobile DDR Memory Controller
The Microtronix Avalon Mobile DDR SDRAM Memory Controller IP Core is designed for building high-performance Avalon-MM / Avalon-ST…
QDR IV XP PHY + Memory Controller
Atria Logic with its vast expertise and working experience for more than a decade in memory domains, brings a high speed PHY and …
Mobiveil’s Enterprise Flash Controller (EFC) is a flexible and configurable design targeted for enterprise storage applications l…
Hyperbus Flash Memory Controller
Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices.
DO-254 DDR Memory Controller 1.00a
A dedicated embedded block multi-port memory controller that greatly simplifies the task of interfacing Spartan-6 devices to the …
DO-254 External Memory Controller 1.00a
Provides the control interface for external synchronous, asynchronous SRAM, Flash and PSRAM/Cellular RAM memory devices through t…
DO-254 AXI 7-Series DDRx (Limited) 1.00a
Maps AXI4 transactions coming from the MicroBlaze™ to the User Interface Block providing an industry-standard bus protocol interf…
Advanced Flash Controller Interface Core
The IPC-BL157A-ZM, Flash Controller Interface (AFCI) is a register level interface that allows software and hardware state machin…
Avalon Multi-port DDR2 Memory Controller
The Avalon Multi-port DDR2 Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II processor in…
SDRAM/SRAM/FLASH Memory Controller
Increasing SoC/ASIC devices' complexity also demands increase in memory bandwidth.
Streaming Multi-port SDRAM Memory Controller
The Streaming Multi-port SDRAM Memory Controller IP Core provides a native RD or WR local port bus interface to SDRAM memory.
Avalon Multi-port SDRAM Memory Controller IP Core
The Microtronix Avalon Multi-port SDRAM Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II…