LPDDR3/4 Memory Controller IP
LPDDR4/3 provides very intense presentation via memory controller design based on proprietary out-of-order scheduling algorithm a…
Overview
LPDDR4/3 provides very intense presentation via advanced memory controller design based on proprietary out-of-order scheduling algorithm and high speed execution capability. Demand for more DRAM bandwidth is getting more powerful than ever in a quest to enhance user experiences (e.g. higher image resolution). Specified the finite amount of physically available DRAM bandwidth, highly efficient memory controller IP is becoming a very critical issue everywhere. With our SoCs can save a notable amount of area & power consumption and meet next generation SoC’s DRAM bandwidth requirements.
Key features
- a. DDR3-LPDDR3 and DDR4-LPDDR4 modes up to 2133Mbps, and 2800Mbps,respectively
- b. x16/x32 data path interface extendable
- c. JEDEC 1.2V SSTL I/Os and 1.1V LVSTL I/Os
- d. Multiple drive strengths adjustable
- e. Independent read and write timing adjustments with auto calibration
- f. Low latency with programmable timings for secure data handling
- g. Per bit de-skew support
- h. Supports point to point memory sub systems and multi-rank
- i. PVT compensation and timing calibration for all corner reliability
- j. At speed BIST, scan insertion
- k. Various power-down modes for low power including self-refresh support
- l. Low jitter with superior noise rejection
- m. APB Port register access interface
- n. Dual Row IO implementation and more
- o. Implemented using 0.8V RVT&LVT core devices and 1.8V gate oxide IO devices
- p. Supports both wire-bond and flip-chip packaging
- q. Built-in ESD
- r. Maintains self-refresh I/O drive state during VDD power down
- s. DFI 2.1/3.1 compliant memory controller interface
- t. Integral DFT
Benefits
- High Utilization
- Zero risk with robust ESD architecture
- Extensive EDA tool support for various design automation flows
- Takes full advantage of process power savings and speed capability.
- Active QoS Control
- Physical-design friendliness
What’s Included?
- Automotive,
- Application Processors,
- Digital Baseband Modems,
- Set-Top-Box,
- Digital TV,
- OTT,
- Surveillance,
- IoT, Enterprise
- SSD Controllers
Specifications
Identity
Standards & Interfaces
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about DDR Interface IP
What is LPDDR3/4 Memory Controller IP?
LPDDR3/4 Memory Controller IP is a DDR IP core from Faststream Technologies listed on Semi IP Hub.
How should engineers evaluate this DDR?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DDR IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.