Vendor: Mobiveil Inc. Category: NOR Flash

Hyperbus Flash Memory Controller

Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices.

Contact Provider Request Datasheet
Controller View all specifications

Overview

Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices. At the same time, the pin-count required to implement the memory subsystem should be restricted. Mobiveil’s HyperBus flash controller was developed to satisfy the need for higher read/write performance while remaining sensitive to the pin-count constraints of modern microcontrollers. Mobiveil’s HyperBus flash controller has the ability to satisfy the memory requirements for both volatile and nonvolatile memories in a large swath of high-performance applications.

Mobiveil’s HyperBus flash Interface is a low pin count interface that achieves significantly higher perfor mance than legacy parallel and SPI interfaces for SPI based NOR flashes. This controller Interface involves a simple read/write protocol that is suitable for both memories and peripheral interfaces. Interestingly, this interface only requires an additional six pins more than the QSPI. The HyperFlash memories coupled with our Hyperbus flash controller provide a new standard for performance by delivering upto 333 MB/s using this 12-pin interface.

Key features

  • Compatible with spansion hyperbus based memory products.
  • 0 Wait State Write Burst Operation for HyperBus memory on AXI interface of up to 256 words.
  • True Continuous Burst Read operation for HyperFlash on HyperBus memory interface.
  • AXI-lite port for control registers accesses.
  • Minimum Gap between two Read Operations for highest performance on HyperBus memory interface.
  • Cache Line accesses for Execution-in-Place (XiP).
  • HyperBus memory device clock of up to 166MHz.
  • Up to 16 outstanding address support in AXI.

Block Diagram

Hyperbus block diagram

Benefits

  • Configurable Options
    • Internal FIFO Depths is configurable
    • AXI parameters configurable
  • Design Attributes
    • Highly modular design
    • Clearly demarked clock domains
    • Software control for key features
    • Loopback for Debugging

What’s Included?

  • Configurable RTL Code
  • HDL based test bench and behavioral models
  • Test cases
  • Protocol checkers, bus watchers and performance monitors
  • Documentation
    • Design Guide
    • Verification Guide

Specifications

Identity

Part Number
Hyperbus
Vendor
Mobiveil Inc.
Type
Silicon IP
Controller / PHY
Controller

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Mobiveil Inc.
HQ: USA
Contact Mobiveil Inc.

Learn more about NOR Flash IP core

Optimizing flash memory selection for automotive & other uses

Over the past few years, there has been an increasing demand for NOR Flash memory for use in automotive applications. Initial uses included applications such as infotainment and engine control. However, as advancements in automotive computerization continue to progress, NOR Flash memory is seeing use in a wider range of various automotive applications.

When Memory Shortages Change Architecture Decisions

For decades, the choice between embedded and external Non-Volatile Memory (NVM) in semiconductor designs has been straightforward. External memory, such as EEPROM, NOR Flash, or NAND Flash, offered lower cost per bit and greater flexibility, making a two-die architecture the default choice across a wide range of applications. That assumption is now being challenged.

How silicon and circuit optimizations help FPGAs offer lower size, power and cost in video bridging applications

FPGAs are at home in the world of multi-gigabit-per-second signal conversion and bridging. In high-bandwidth telecoms, network and data center equipment, the FPGA is a mainstay of system designs, offering a valuable combination of high-speed SerDes capability, extensive logic resources, and programmability, giving designers the flexibility to modify features and functions without changing their board layout.

Software Architecture for DO-160 Qualification of STM32H7 based systems

Any hardware that is to be installed in an aerospace system must undergo the DO-160 qualification testing. The DO-160 qualification testing includes different environmental conditions and test procedures like temperature, humidity, vibration, waterproofness, fluid susceptibility, fungus resistance, shock and crash, RF emission, and so on.

Enabling AI Vision at the Edge

Computer vision has made tremendous advances in the last several years due to the proliferation of AI technology. The intersection of big data and massive parallel computing changed the way in which machines are programmed to understand unstructured 2D and 3D data, such as video feeds from cameras.

Frequently asked questions about NOR Flash Interface IP

What is Hyperbus Flash Memory Controller?

Hyperbus Flash Memory Controller is a NOR Flash IP core from Mobiveil Inc. listed on Semi IP Hub.

How should engineers evaluate this NOR Flash?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NOR Flash IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP