Vendor: T2M GmbH Category: LPDDR

DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)

The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps.

Contact Provider Request Datasheet
Controller + PHY + 1 LPDDR4 TSMC 28nm HPC+ In Production View all specifications

Overview

The LPDDR4/ DDR4/ DDR3L Combo PHY IP offers low latency and supports throughput of up to 1866Mbps. The PHY IP is silicon validated in the TSMC 28HPC+ process technology, complies with the most recent JEDEC requirements, and is created for quick integration and market entry.

Key features

  • Supported DRAM type: DDR3L/DDR4/LPDDR4
  • Maximum controller clock frequency of 400MHz resulting in maximum DRAM data rate of 1866Mbps
  • Interface: SSTL135/POD12/LVSTL
  • Data path width scales in 32-bit increment
  • Four modules for flexible configuration:CA/DQ_X16/DQ_X8/ZQ
  • Programmable output impedance (DS)
  • Programmable on-die termination (ODT)
  • Core power:0.9V, I/O power (VDDQ):1.5V/1.35V/1.2V, RX power:1.8V
  • ESD: 2KV/HBM, 200V/MM, 500V/CDM
  • Support ZQ calibration
  • Support 8 ranks
  • Support write-leveling, CBT
  • Support PHY internal VREFDQ auto decision
  • Per-bit deskew in read and write datapath
  • Silicon Proven in TSMC 28HPC+ process technology
  • Supported metal scheme: 1P7M_1C

Block Diagram

LPDDR4/ DDR4/ DDR3L Combo PHY IP block diagram

What’s Included?

  • Application Note / User Manual
  • Behavior model, and protected RTL codes
  • Protected Post layout netlist and Standard Delay Format (SDF)
  • Frame view (LEF)
  • Metal GDS (GDSII)
  • Test patterns and Test Documentation

Silicon Options

Foundry Node Process Maturity
TSMC 28nm HPC+ In Production

Specifications

Identity

Part Number
LPDDR4/ DDR4/ DDR3L Combo PHY IP
Vendor
T2M GmbH
Type
Silicon IP
Controller / PHY
Controller + PHY , PHY

Standards & Interfaces

Memory
LPDDR4

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

T2M GmbH
HQ: Germany
Contact T2M GmbH

Learn more about LPDDR IP core

LPDDR flash: A memory optimized for automotive systems

Next-generation automotive systems are advancing beyond the limits of currently available technologies. The addition of advanced driver assistance systems (ADAS) and other advanced features requires greater processing power and increased connectivity throughout the vehicle.

SOCAMM: Modernizing Data Center Memory with LPDDR6/5X

Small Outline Compression-Attached Memory Module (SOCAMM) has made its way into the data center as an alternative to external CPU memory, due to its high performance, low power, memory capacity, and scalability.

Frequently asked questions about LPDDR Interface IP

What is DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+)?

DDR4/ LPDDR4/ DDR3L PHY IP - 1866Mbps (Silicon Proven in TSMC 28HPC+) is a LPDDR IP core from T2M GmbH listed on Semi IP Hub. It is listed with support for tsmc In Production.

How should engineers evaluate this LPDDR?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LPDDR IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP