USB 2.0 PHY IP, Silicon Proven in TSMC 22ULP
The USB 2.0 PHY IP Core is a full physical layer (PHY) IP solution created for excellent performance and low power consumption.
- USB 2.0
- TSMC
- 22nm
- ULP
- In Production
Single-Protocol PHY IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare Single-Protocol PHY IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
USB 2.0 PHY IP, Silicon Proven in TSMC 22ULP
The USB 2.0 PHY IP Core is a full physical layer (PHY) IP solution created for excellent performance and low power consumption.
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
The DisplayPort v1.4 Tx PHY IP in 12FFC is a modernistic technology designed to be integrated into chip designs for various devic…
PPA optimized for short reach connectivity
GbE (10/100 Base-T) PHY IP, Silicon Proven UMC 40LP
An IEEE 802.3u compliant single-port Ethernet physical layer transceiver with low power consumption for 10BASE-Te and 100BASE-TX …
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
Data rates for the DisplayPort transmitter PHY version 1.4 range from 1.62Gbps (RBR) to 5.4Gbps (HBR2).
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
This PHY IP supports both USB 3.1 Gen1 & Gen2.
LVDS/FPD Link IP, Silicon Proven in GF 28LPe
A physical layer IP for LVDS transmitter.
LVDS/FPD Link IP, Silicon Proven in GF 65/55LPe
A transmitter for LVDS with a physical layer IP.
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 40SP
The Display Port 1.4 Rx IP Channel's maximum capacity is supported.
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP
Version 1.4 of the DisplayPort transmitter PHY is capable of transmitting data at rates of 1.62Gbps (RBR) to 5.4Gbps (HBR2).
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2).
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2).
USB 2.0 PHY IP, Silicon Proven in UMC 28HPC
The USB 2.0 PHY IP Core offers a physical layer (PHY) solution for high performance and low power.
USB 2.0 PHY IP, Silicon Proven in UMC 40LP
The USB2.0 PHY IP is a full physical layer (PHY) IP solution created for excellent performance and low power consumption.
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in SMIC 14SF+
With this PHY IP, it supports both USB 3.1 Gen1 and Gen2.
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in UMC 28HPC
It supports both USB 3.1 Gen1 and Gen2 with this PHY IP.
USB 3.0 PHY IP, Silicon Proven in SMIC 14SF+
For auxiliary devices, a Universal Serial Bus (USB) transceiver is offered.
USB 3.0 PHY IP, Silicon Proven in UMC 40SP
A Universal Serial Bus (USB) transceiver is available for peripheral devices.
USB 2.0 PHY IP, Silicon Proven in SMIC 40LL
The USB 2.0 PHY IP Core is a solution for the physical layer (PHY) that prioritizes both high performance and low power consumpti…
USB 2.0 PHY IP, Silicon Proven in SMIC 55LL
The USB2.0 PHY IP is a comprehensive physical layer (PHY) IP solution created for exceptional performance and low power consumpti…