Overview
Synopsys provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0 specifications. Synopsys eUSB2 PHY IP has industry's best combination of low area and low power in leading process technologies from 7nm and below.
The Synopsys eUSB2 IP is built on years of customer successes with Synopsys’ silicon-proven USB PHY product line, which has been ported to over 100 process nodes ranging from 180nm to 5nm.
With over 3,000 design wins and over 4 billion silicon-proven units shipped, Synopsys' USB IP solution, consisting of digital controllers, PHYs, IP subsystems, and verification IP, enables designers to lower integration risk and speed time-to-market.
Learn more about Single-Protocol PHY IP core
Recognition highlights leadership in agentic AI design, advanced-node enablement, co-packaged optics, and silicon-proven IP for next-generation AI systems
Leading portfolio of engineering solutions positions Synopsys to capitalize on the continued expansion of digital and physical AI and the AI-driven transformation of engineering.
The companies signed an expansive, multi-year agreement to jointly develop GPT-Synopsys, a specialized model, optimized to use Synopsys EDA tools to perform semiconductor design workflows.
The multi-year agreement marks the expansion of Synopsys' silicon IP business to serve increasing demand for application-optimized IP with Amazon as its lead customer.
Open and Secure Synopsys Autopilot Platform Accelerates Engineering Productivity, Improves Design Quality, and Achieves Faster Closure Across Silicon to Systems
New collaborations span A14 design enablement, AI-assisted engineering workflows, CoWoS® support for multi-die designs, and unified multiphysics signoff