The AXI Ethernet Lite MAC supports the IEEE Std.
- Ethernet
High-Speed Serial IP cores enable the high-bandwidth connectivity required by modern SoCs, AI accelerators, networking equipment, storage systems, telecom infrastructure, aerospace platforms, and data center devices. These IP solutions provide reliable, standards-compliant communication between chips, boards, systems, and external networks.
This catalog includes IP cores supporting industry-standard protocols such as PCI Express, CXL, Ethernet, USB, Fibre Channel, SAS, InfiniBand, Interlaken, JESD204, Optical Transport, CPRI, RapidIO, UniPro, CoaXPress, SpaceWire, and other high-speed serial interfaces. Solutions may include PHYs, controllers, protocol stacks, subsystem IP, and verification components.
Compare high-speed serial IP offerings from multiple vendors based on supported standards, data rates, feature sets, protocol compliance, silicon efficiency, and target applications to identify the right connectivity solution for advanced ASIC and SoC designs.
The AXI Ethernet Lite MAC supports the IEEE Std.
Triple-Rate SDI on Virtex-6 FPGAs
The Serial Digital Interface (SDI), is widely used in broadcast applications for the transport of uncompressed SD and HD digital …
Xilinx Interlaken IP core is based on Sarance Technologies Best-In-Class Intellectual Property Interlaken is a scalable chip-to-c…
Tri-Rate Serial Digital Interface (SDI) Physical Layer (PHY)
Serial Digital Interface (SDI) is the most popular raw video connectivity standard used in television broadcast studios and video…
The SPI4 Intellectual Property (IP) core enables user instantiation of OIF-compliant System Packet Interface Level 4 Phase 2 Revi…
Multi-Rate Serial Digital Interface (SDI) PHY Layer
As the proliferation of HDTV, IPTV and VoD streaming continues, together with the increased functionality and decreasing costs of…
JEDEC Standard No.
PCI Express is a high performance, fully scalable, well defined standard for a wide variety of computing and communications platf…
Digital Video Broadcasting - (DVB-ASI) IP Core
Digital Video Broadcasting (DVB) is a suite of open standards for digital television.
The SFI-5 Intellectual Property (IP) core enables user instantiation of an OIF-compliant SERDES Framer Interface Level 5 (SFI-5) …
Common Public Radio Interface - IP Core
This document provides technical information about the Lattice Common Public Radio Interface (CPRI) IP core.
The 2.5Gb MAC core can support data rates of 1Gbps or 2.5Gbps in LatticeSC/M™ devices.
FireCorerepresents the world’s only fully self-contained yet flexible IEEE1394 bus interface solution suite.
Xilinx provides a no charge Dune Network compliant RXAUI core to ensure first time success in your design.
Virtex-6 Embedded Tri-mode Ethernet MAC Wrapper
Xilinx provides a Virtex-6 Integrated Tri-mode Ethernet MAC core with integrated serial interface to ensure first time success in…
Free LogiCORE™ IP design enabling the use of multi-gigabit transceivers for Xilinx FPGA Aurora is a LogiCORE™ IP designed to enab…
Virtex-6 Integrated Block for PCI Express (PCIe)
Xilinx provides a Virtex-6 FPGA Endpoint solutions for PCI Express® (PCIe) to configure the Virtex-6 FPGA Integrated Block for PC…
Spartan-6 FPGA Integrated Endpoint Block for PCI Express (PCIe)
Xilinx provides a Spartan-6 FPGA Integrated Endpoint solution for PCI Express® (PCIe) to configure the Spartan-6 FPGA Integrated …
32-bit/33MHz Multi-Function PCI Master/Target
The PCI-M32MF implements a master/target PCI interface compliant with the PCI 2.3 specification.
Ethernet AVB Endpoint IP LogiCORE
Ethernet AVB has been merged with the AXI TEMAC IP and AXI Ethernet IP.