Vendor: Lattice Semiconductor Corp. Category: CPRI

Common Public Radio Interface - IP Core

This document provides technical information about the Lattice Common Public Radio Interface (CPRI) IP core.

Overview

This document provides technical information about the Lattice Common Public Radio Interface (CPRI) IP core. This IP core together with SERDES and Physical Coding Sublayer (PCS) functionality integrated in the LatticeECP3™ and ECP5™ LFE5UM FPGAs implements the physical layer of the CPRI specification and interleaves IQ data with synchronization, control and management information. It can be used to connect Radio Equipment Control (REC) and Radio Equipment (RE) modules.

The CPRI IP core implements not only all of the capabilities required to support the physical layer of the CPRI specification (basic function), but also specific requirements related to link delay accuracy (low latency character).

One CPRI core configuration for 5G version (4.9152 Gbps) is also supported. It is similar to the "low latency" one for 3G version except the data rate.

Key features

  • Supports the physical link layer (Layer 1) of the CPRI specification
  • Supports three standard bit rates of the CPRI specification
    • 614.4 Mbps
    • 1228.8 Mbps
    • 2457.6 Mbps
    • 3072 Mbps
  • Supports 8b/10b encoding/decoding performed in the PCS/SERDES
  • Supports code-violation detection performed in the PCS/SERDES
  • Performs CPRI Hyperframe Framing
    • Performs interleaving of IQ data, sync, C&M data, and vendor specific information
    • Provides an 8-, 16-, or 32-bit parallel interface for IQ data
  • Performs subchannel mapping:
    • Supports a slow C&M channel based on a serial HDLC interface at standard bit rates (240 Kbps, 480 Kbps,960 Kbps, and 1920 Kbps). The HDLC framer, if needed, must be provided as a separate IP core.
    • Supports a fast C&M channel based on a serial Ethernet interface (84.48 Mbps max.) to the user logic, anon-standard rate MII Ethernet interface to a MAC, or a 100 Mbps MII interface to a PHY device. Accepts a user-selected pointer to the CPRI subchannel where the Ethernet link starts. The Ethernet MAC function isprovided as a separate IP core.

Block Diagram

CPRI block diagram

Specifications

Identity

Part Number
CPRI
Vendor
Lattice Semiconductor Corp.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about CPRI IP core

Lattice Collaborates with TI to Accelerate Edge AI for Robotics and Industrial Applications

The collaboration demonstrates a real-time AI sensor fusion architecture that integrates TI mmWave radar and camera sensors using NVIDIA Holoscan Sensor Bridge running on Lattice’s low power FPGA. The FPGA acts as a companion chip delivering synchronized sensor data directly into GPU-accessible memory to enable low-latency and robust perception for robotics and industrial edge AI applications.

Frequently asked questions about CPRI IP cores

What is Common Public Radio Interface - IP Core?

Common Public Radio Interface - IP Core is a CPRI IP core from Lattice Semiconductor Corp. listed on Semi IP Hub.

How should engineers evaluate this CPRI?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPRI IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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