Vendor: Xilinx, Inc. Category: Ethernet

AXI Ethernet Lite

The AXI Ethernet Lite MAC supports the IEEE Std.

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Overview

The AXI Ethernet Lite MAC supports the IEEE Std. 802.3 Media Independent Interface (MII) to industry standard Physical Layer (PHY) devices and communicates to a processor via AXI4 or AXI4-Lite interface. The design provides a 10 megabits per second (Mbps) and 100 Mbps (also known as Fast Ethernet) Interface, delivering the minimal functions necessary to provide an Ethernet interface with the least resources used.

Key features

  • Parameterized AXI slave interface based on the AXI4 or AXI4-Lite specification
  • Memory mapped direct I/O interface to the transmit and receive data dual port memory
  • Media Independent Interface (MII) for connection to external 10/100 Mbps PHY transceivers
  • Independent internal 2K byte Tx and Rx dual port memory for holding data for one packet
  • Optional dual buffer memories, 4K byte pingpong, for Tx and Rx
  • Receive and Transmit Interrupts
  • Optional MDIO interface for PHY access

Specifications

Identity

Part Number
AXI Ethernet Lite
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Xilinx, Inc.
HQ: USA
Contact Xilinx, Inc.

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Frequently asked questions about Ethernet IP cores

What is AXI Ethernet Lite?

AXI Ethernet Lite is a Ethernet IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Ethernet?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Ethernet IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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