4GHz Fractional PLL on TSMC 28nm
Analog-PLL For Frequency Multiplying on TSMC 28nm
- TSMC
- 28nm
- HPC+
- Available on request
4GHz Fractional PLL on TSMC 28nm
Analog-PLL For Frequency Multiplying on TSMC 28nm
ADPLL For Spread Spectrum Clock on TSMC T22ULP
4.1GHz Multiplying PLL on TSMC 16nm
Analog-PLL For Frequency Multiplying on TSMC 16nm
Analog-PLL For Spread Spectrum Clock on TSMC 3nm
Analog-PLL For Spread Spectrum Clock on TSMC N3E
Dual Channel 8b D/A Converter - TSMC T40ULP
A Dual Channel 8b D/A converter is provided with TSMC T40ULP+ESF3 wafer process. I
Dual Channel 12b D/A Converter - TSMC T40ULP+ESF3
A Dual Channel 12b D/A converter are provided with TSMC T40ULP+ESF3 wafer process
8bit D/A Converter - TSMC 22nm ULP
This IP is an ultra-compact 8-bit D/A converter operating at a supply voltage of 1.8V. High accuracy and monotonicity are guaranteed.
12bit 2MSps A/D Converter - TSMC T22ULP
This IP is Successive Approximation Register (SAR) Analog to Digital Converter on TSMC T22ULP
MIPI C‑PHY/D‑PHY IP on TSMC N2P
The MXL_CSI2_RX_USL_CDPHY_ECM_T_2N2P is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the …
Kamaten frequency dividers reduce input digital signal (clock) frequency and can be set to any integer division ratio from 1 to 8…
MIPI D-PHY and FPD-Link(LVDS) Combinational Transmitter for TSMC 22nm ULP
The MIPI D-PHY and FPD-Link (LVDS) combinational Transmitter is useful 4 Data Channel driverhard macro for DSI® of TSMC 22nm ULP process.
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
LPDDR6/5X/5 PHY V2 - TSMC N5A for Automotive, ASIL B Random, AEC-Q100 Grade 2
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
LPDDR6/5X/5 PHY V2 - TSMC N3A for Automotive, ASIL B Random, AEC-Q100 Grade 2
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…
The LPDDR6/5X/5 PHY IP enables ASICs, ASSPs, system-on-chips (SoCs), and system-in-package applications requiring high-performanc…