12-bit, 2Msps, SAR Analog-to-Digital Converter IP (0.9V)
12-bit, 2Msps, successive approximation register (SAR) analog-to-digital converter (A/D) that is fabricated using TSMC's T22ULP
Overview
The AT22PADC000012206BSKA0 is a 12-bit, 2Msps, successive approximation register (SAR) analog-to-digital converter (A/D) that is fabricated using TSMC's T22ULP (22nm Ultra-Low Power) process technology.
Parameters
| Attributes | Value |
|---|---|
| Product Category | ADC |
| Method | Successive Approximation Register |
| Process | TSMC T22ULP |
| Analog Supply Voltage (V) | 1.65 - 1.95 |
| Digital Supply Voltage (V) | 0.81 - 0.99 |
| Temp. Range (°C) | -40°C to 125°C |
| Number of Channels | 16 (Input), 1 (Output) |
| Conversion Rate (Max) (kSPS) | 2000 |
| No-Load Operating Current | 1mA (Max.) |
Key features
- Conversion method: Successive approximation register (SAR)
- Sampling rate: 2Msps (Max.)
- A/D clock frequency: 108MHz
- Resolution: 12-bit
- Differential nonlinearity (DNL) = -1LSB (Min.)/+2LSB (Max.)
- Integral nonlinearity (INL) = -4LSB (Min.)/+4LSB (Max.)
- Analog supply voltage: VCCA = 1.8V ± 0.15V
- Digital supply voltage: VDD = 0.9V ± 0.09V
- Consuming current: 1mA (max)
- Junction temperature: -40°C to 125°C
- Input channel: 16
- Process: TSMC T22ULP
Block Diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 22nm | ULP | Available on request |
Specifications
Identity
Analog
Files
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Provider
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Frequently asked questions about ADC IP cores
What is 12-bit, 2Msps, SAR Analog-to-Digital Converter IP (0.9V)?
12-bit, 2Msps, SAR Analog-to-Digital Converter IP (0.9V) is a ADC IP core from Renesas listed on Semi IP Hub. It is listed with support for tsmc Available on request.
How should engineers evaluate this ADC?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ADC IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.