12 bit, 200 MSPS ADC on TSMC 16nm FFC
The ODT-ADS-12B200M-16FFCT is an ultra low power ADC designed in a 16nm CMOS process.
- TSMC
- 16nm
12 bit, 200 MSPS ADC on TSMC 16nm FFC
The ODT-ADS-12B200M-16FFCT is an ultra low power ADC designed in a 16nm CMOS process.
The ODT-UCIE-UNI-TX-16GXX-16FFCT is a low power D2D transmitter IP in TSMC 16FFC process.
GCRAM, the highest-density on-chip embedded memory in standard CMOS
RAAAM’s Gain-Cell RAM (GCRAM) is the most cost-effective on-chip memory technology in the semiconductor industry.
12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
The A12B400M is a low-power, high-speed analog to digital converter (ADC) intellectually property (IP) design block.
32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator/Checker
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7, 15 or 31 order, up to 32Gbps.
12-bit, 200 MSPS Pipeline ADC - TSMC 28nm
The A12B200M is a low-power, analog to digital converter (ADC) intellectually property (IP) design block.
Low Power All Digital Fractional-N PLL in TSMC N6/N7
The DeepSub™ pPLL05 is a low power, low voltage all digital PLL featuring low-jitter and compact area.
DDR3 and DDR4 Controller and PHY on TSMC 12nm
This DDR3/4 IP combo solution presented, is meticulously designed for high performance and low power consumption, utilizing sophi…
32G PHY in TSMC (N5A, N3A) for Automotive
The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high…
UCIe-S PHY for Standard Package (x32) in TSMC (N3P)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data c…
UCIe-S PHY for Standard Package (x16) for Automotive in TSMC (N5A)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data c…
PCIe 7.0 PHY in TSMC (N5, N3P)
The multi-channel PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across back…
20 to 50 MHz crystal oscillator
055TSMC_OSC_01 is a reference frequency generator designed to form a reference signal in the frequency range from 10 to 50MHz.
MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (N5A)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband proce…
The Ceva-Waves Links100 is a low-power multi-protocol wireless connectivity IoT platform combining a cost-optimized Wi-Fi 6 1×1 4…
your custom Switch Fabric, AI, or HPC ASIC with Credo’s SerDes IP.
LPDDR5X Secondary/Slave (memory side!) PHY
This LPDDR5X PHY is a memory-side interface IP normally found implemented within commodity DRAM products.
LPDDR5 Secondary/Slave (memory side!) PHY
This LPDDR5 PHY is a memory-side interface IP normally found implemented within commodity DRAM products.
LPDDR4x Secondary/Slave (memory side!) PHY
This LPDDR4X PHY is a memory-side interface IP normally found implemented within commodity DRAM products.
Die-to-Die, High Bandwidth Interconnect PHY in TSMC (N7, N5)
The Synopsys High-Bandwidth Interconnect PHY IP enables high bandwidth, low-power and low-latency die-to-die connectivity in a pa…