PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 22ULP
The PCIe 3.0 PHY IP is designed to support increased applications with its low-power, multi-lane, high-performance design.
- TSMC
- 22nm
- ULP
- In Production
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 22ULP
The PCIe 3.0 PHY IP is designed to support increased applications with its low-power, multi-lane, high-performance design.
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
High-bandwidth applications can avail advantage of PCIe 3.0 PHY IP's high performance, multi-lane scalability, and low-power layo…
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
To support high-bandwidth applications, PCIe 3.0 PHY IP provides a low-power, multi-lane, high-performance design.
PCIe 3.0 Serdes PHY IP, Silicon Proven in TSMC 7nm
For the high-bandwidth applications, PCIe 3.0 PHY IP offers high-performance, multi-lane capabilities, and low-power design.
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
For high-bandwidth applications, the PCIe 4.0 PHY IP delivers high-performance, multi-lane capabilities and a low-power design.
PCIe 4.0 Serdes PHY IP Silicon Proven in TSMC 7nm
The high-bandwidth applications benefit from the low power, multi-lane, and high-performance PCIe 4.0 PHY IP's design.
PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 16FFC
For high-bandwidth applications, the PCIe 5.0 PHY IP offers excellent performance, multi-lane capabilities, and low power design.
USB 3.1 Type-C PHY IP, Silicon Proven in TSMC 55ULP
USB3.1Type-C PHY IP is a high performance high speed SERDES IP designed for chips that perform high bandwidth data communication …
USB 2.0 PHY IP, Silicon Proven in TSMC 22ULP
The USB 2.0 PHY IP Core is a full physical layer (PHY) IP solution created for excellent performance and low power consumption.
MIPI D-PHY Rx IP, Silicon Proven in TSMC 28HPC+
The MIPI D-PHY Rx IP Core in 28HPC+ aligns precisely with the D-PHY specification version 1.2, facilitating support for the Displ…
MIPI D-PHY Tx IP, Silicon Proven in TSMC 28HPC+
The MIPI D-PHY Tx IP Core fully complies with version 1.2 of the D-PHY specification.
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
The DisplayPort v1.4 Tx PHY IP in 12FFC is a modernistic technology designed to be integrated into chip designs for various devic…
eDisplay Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 22ULP
eDP/DP Tx PHY is designed for chips that perform eDP/DP data communication while operating at low power consumption.
PPA optimized for short reach connectivity
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
Data rates for the DisplayPort transmitter PHY version 1.4 range from 1.62Gbps (RBR) to 5.4Gbps (HBR2).
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
This PHY IP supports both USB 3.1 Gen1 & Gen2.
PCIe 4.0 Serdes PHY IP, Silicon Proven in TSMC 28HPCP
With compatibility for PIPE 4.4 interface protocol, this Peripheral Component Interconnect Express (PCIe) x4 PHY complies with PC…
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2).
PCIe is the most common protocol in high speed serial standards to connect components in embedded systems.
USB 3.0/ PCIe 2.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
The Combo PHY is a USB 3.0 and PCIe 2.0 PHY IP solution designed for a mobile and data consumer applications in TSMC 28nm process.