The nSAD_TS180_1V8_AD12b2M is a 12b 2MS/s, 11 ENOB, low-power SAR fully-differential AD converter designed on the TSMC 180 proces…
- 12 Bit
- TSMC
- 90nm
- CIS
- Pre-Silicon
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
The nSAD_TS180_1V8_AD12b2M is a 12b 2MS/s, 11 ENOB, low-power SAR fully-differential AD converter designed on the TSMC 180 proces…
12-bit 2-channel up to 50 MSPS current steering DAC
180TSMC_DAC_07 is a 12-bit 50 MSPS dual current steering DAC contains two DAC cores, reference current, bandgap, configuration re…
12-bit 1-channel 20 to 100 MSPS ADC
The low-power high-speed 12-bit ADC employs a high-performance differential pipeline architecture.
12-bit 1-channel 4 MSPS SAR ADC
065TSMC_ADC_10 employs high-performance differential successive approximation architecture with sub-ranging and output offset com…
12-bit 4-channel 20 to 100 MSPS ADC
Quad-channel 12-bit 20 – 100 MSPS ADC contains four ADC channels, LVDS receiver, reference voltages and reference currents circui…
This device is designed to generate a quadrature heterodyne (oscillator) signal.
16-bit 2-channel 25 kHz bandwidth delta-sigma stereo, audio DAC
Delta-sigma stereo, audio DAC contains: reference voltage, control logic, digital buffers I2S interface (ws, sd, sck, gpio), two …
The 10-bit 100 MSPS ADC employs a high-performance front-end sample-and-hold with differential multi-stage pipelined architecture…
AGAD11 is a 10bit 100MSPS pipeline A/D converter.
12-bit 800 kSPS cascade delta-sigma ADC
The block is third order cascade (2-1) delta-sigma ADC with 5-level quantizers in both stages.
14-bit 1-channel 100/125 MSPS pipeline ADC
The high-speed 14-bit ADC employs a high-performance differential pipeline architecture.
Reference current and voltage source with temperature sensor
Reference current and voltage source (RS) is used to supply analog blocks.
Baseband power amplifier with attenuator
PA consists of attenuator, 1-stage amplifier with tunable gain.
Device is used to transfer incoming useful intermediate-frequency signal (IF) to high frequencies (RF).
75 MHz to 3 GHz Power amplifier
065TSMC_PA_01 is a broadband power amplifier, which consist of three cascades.
14-bit 1-channel 50 MSPS pipeline ADC
The ADC has built on pipelined architecture.
Wide band 3Ghz-6GHz integer phase-locked loop
065TSMC_PLL_08 is an integer-N phase-locked loop frequency synthesizer (PLL) based on fully integrated wide band LC-VCO with rang…
Wide band 3Ghz-6GHz fractional phase-locked loop
It is a phase-locked loop frequency synthesizer (PLL) with integer-N/fractional-N modes based on fully integrated wide band LC-VC…
Phase-locked loop clock generator
It is a integer-N phase-locked loop frequency synthesizer (PLL) based on fully integrated 2GHz LC-VCO with low gain and fine phas…
0.035... 100 MHz intermediate-frequency amplifier
IFA consists of 6-stage amplifier with tunable gain, AGC system, linear output buffer for differential analog output.