Vendor: NTLab Category: DAC

16-bit 2-channel 25 kHz bandwidth delta-sigma stereo, audio DAC

Delta-sigma stereo, audio DAC contains: reference voltage, control logic, digital buffers I2S interface (ws, sd, sck, gpio), two …

16 Bit TSMC 180nm BCDG2 Silicon Proven View all specifications

Overview

Delta-sigma stereo, audio DAC contains: reference voltage, control logic, digital buffers I2S interface (ws, sd, sck, gpio), two identical channels L and R: 2-order delta-sigma modulator, current steering DAC, low pass filter, analog buffer. Delta-sigma stereo, audio DAC requires 2.8 ÷3.6 V analog supply, 1.62 ÷ 1.98 V digital supply, reference current 4.95 ÷ 5.05 uA, input clock with duty cycle 45 ÷ 55 %. Delta-sigma stereo, audio DAC supports standby mode. There is the ability to configure the operating modes of the delta-sigma stereo, audio DAC with digital registers: register mode<2:0> controls the modes of the delta-sigma stereo, audio DAC and I2S interface (sd, ws), register mode_sck<2:0> controls the modes of I2S interface (sck), register mode_gpio<2:0> controls the modes of I2S interface (gpio). There is the ability to configure current consumption of the delta-sigma stereo, audio DAC with digital register: register adj_idc_buff<3:0> adjusts current of the analog buffer, register adj_idc_cs<3:0> adjusts current of the current steering DAC, register adj_idc_lpf<4:0> adjusts current of the low pass filter, signal enrc adjusts current of current steering DAC changing linearity of the current steering DAC.
Register adj_idc_cs<3:0> is also controls output voltage peak to peak.

Key features

  • TSMC 0.18 um SiGe BiCMOS
  • Resolution 16 bit
  • 2-channel
  • Different power supplies for digital and analog parts
  • Sampling rates from 8 to 32 MHz
  • Full power bandwidth up 25 kHz
  • Standby mode (current consumption):
    • 8.9 nA analog parts
    • 5.4 uA digital parts
  • Low-Power Dissipation:
    • 61 mW low impedance mode Rload = 32 Ohm
    • 5.6 mW high impedance mode Rload = 32 kOhm
  • Spurious-free dynamic range:
    • 83 dB low impedance mode Rload = 32 Ohm
    • 76 dB high impedance mode Rload = 32 kOhm
  • Signal-to-noise ratio:
    • 69 dB low impedance mode Rload = 32 Ohm
    • 73 dB high impedance mode Rload = 32 kOhm
  • Compact die area 0.44 mm2
  • Portable to other technologies (upon request)

Block Diagram

Applications

  • Portable devices

What’s Included?

  • Schematic or NetList
  • Abstract model (.lef and .lib files)
  • Layout view (optional)
  • Behavioral model (Verilog)
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Silicon Options

Foundry Node Process Maturity
TSMC 180nm BCDG2 Silicon Proven

Specifications

Identity

Part Number
180TSMC_DAC_03
Vendor
NTLab
Type
Silicon IP

Analog

Resolution bits
16 Bit

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Lithuania

Learn more about DAC IP core

Specifying a PLL Part 1: Calculating PLL Clock Spur Requirements from ADC or DAC SFDR

In high end RF systems, such as 5G radios, the requirements are so stringent that the source of this strongest unwanted tone can be the PLL. This article outlines how spurs in the input clock to the ADC or DAC may limit the SFDR. This in turn will set the requirements for the spurs for the input clock (from a PLL), in order to achieve a specific SFDR.

Frequently asked questions about DAC IP cores

What is 16-bit 2-channel 25 kHz bandwidth delta-sigma stereo, audio DAC?

16-bit 2-channel 25 kHz bandwidth delta-sigma stereo, audio DAC is a DAC IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this DAC?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DAC IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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