RF front-ends for GSM mobile handsets continue down path of integration
RF front-ends for GSM mobile handsets continue down path of integration
Vendor:
NTLab
Category:
RF Front End
0.75-1.20 GHz quadrature former
The quadrature former with phase correction.
Overview
The quadrature former with phase correction. Quadrature signal is formed in the trigger cell by means of division by 2.
D-trigger synchronize output signal with input signal to minimize phase error.
The QF is designed using TSMC 65 nm CRN65LP technology.
Key features
- TSMC CMOS 65 nm
- Output frequency range 0.75-1.20 GHz
- Input signal division by 2
- 0.1 degree precise phase adjustment
- Strobing of output signal
Block Diagram
065TSMC_QF_02 block diagram
Applications
- Quadrature signal processing for mixer
What’s Included?
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 65nm | GP | Silicon Proven |
Specifications
Identity
Part Number
065TSMC_QF_02
Vendor
NTLab
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Lithuania
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Frequently asked questions about RF Front End IP cores
What is 0.75-1.20 GHz quadrature former?
0.75-1.20 GHz quadrature former is a RF Front End IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.
How should engineers evaluate this RF Front End?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this RF Front End IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.