T2M GmbH is the leading Global Technology Company supplying state of the art complex semiconductor connectivity IPs and KGDs, enabling the creation of complex connected devices for Mobile, IoT and Wearable markets.
T2M's unique SoC White Box IPs are the design database of mass production RF connectivity chips supporting standards including Wifi, BT, BLE, Zigbee, NFC, LTE, GSM, GNS. They are available in source code as well as KGD for SIP / modules.
With offices in USA, Europe, China, Taiwan, South Korea, Japan, Singapore and India, T2M’s highly experienced team provides local support, accelerating product development and Time 2 Market.
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+
The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwid…
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in UMC 55SP/EF
The combination PHY consists of a Serial ATA (SATA) conforming with the SATA 3.0 Specification, a Peripheral Component Interconne…
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 28SF
The combined PHY complies with USB (USB 3.0, USB 2.0), PCIe (Peripheral Component Interconnect Express), Serial ATA (SATA 3.0 Spe…
USB 2.0 PHY IP, Silicon Proven in TSMC 22ULP
The USB 2.0 PHY IP Core is a full physical layer (PHY) IP solution created for excellent performance and low power consumption.
14-bit, 4.32Gsps Ultra high speed Wideband, Time-Interleaved Pipeline ADC IP
This ultra high speed wide-band Analog-to-Digital Converter is based on 16 Time Interleaved Pipeline sub-ADC followed by a digita…
JESD204B Tx-Rx PHY IP, Silicon Proven in UMC 55SP
With the JESD204B Tx-Rx PHY IP interface, which fully supports the JESD204B synchronous serial interface, the JESD204B version sp…
JESD204B Tx-Rx PHY IP, Silicon Proven in SMIC 12SF++
In order to provide full support for the JESD204B synchronous serial interface, the JESD204B Tx-Rx PHY IP interface is compliant …
MIPI D-PHY Rx IP, Silicon Proven in TSMC 28HPC+
The MIPI D-PHY Rx IP Core in 28HPC+ aligns precisely with the D-PHY specification version 1.2, facilitating support for the Displ…
MIPI D-PHY Tx IP, Silicon Proven in TSMC 28HPC+
The MIPI D-PHY Tx IP Core fully complies with version 1.2 of the D-PHY specification.
PCIe 3.0 Serdes PHY IP, Silicon Proven in SMIC 28SF
This Peripheral Component Interconnect Express (PCIe) x4 PHY is compliant with PCIe 3.0 Base Specification with support of PIPE 4…
USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP
The unified PHY complies with the USB, USB 3.0, Serial ATA, Peripheral Component Interconnect Express (PCIe), and USB 2.0 interfa…
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
The DisplayPort v1.4 Tx PHY IP in 12FFC is a modernistic technology designed to be integrated into chip designs for various devic…
eDisplay Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 22ULP
eDP/DP Tx PHY is designed for chips that perform eDP/DP data communication while operating at low power consumption.
DDR5/DDR4/LPDDR5 Combo PHY IP - 4800Mbps (Silicon Proven in TSMC 12FFC)
The DDR PHY IP supports DDR5/ DDR4/ LPDDR5, provides low latency, and enables up to 5400MT/s throughput.
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP
The unified PHY complies with the USB, USB 3.0, Serial ATA, Peripheral Component Interconnect Express (PCIe), and USB 2.0 interfa…
ultra Low power Bluetooth v5.3 Dual-Mode RF IP in TSMC40nm
Ultra-Low-Power Bluetooth Dual-Mode RF Transceiver IP in TSMC 40nm Logic LP processes node, The Radio Support standards like Blue…
CCSDS AR4JA LDPC Encoder/Decoder
AR4JA LDPC decoder is a configurable design that allows runtime configuration for decoding different code rates (i.e., 1/2, 2/3, …
LDPC corrects errors caused by flash storage failure mechanisms.
The Reed Solomon Encoder is fed with an input message of K information symbols, the Encoder appends 2T parity symbols to the inpu…
A Forward Error Correction (FEC) subsystem is needed in almost all wireless communication systems.