Dolphin Technology offers high performance DDR4/3/2 SDRAM and LPDDR5/4x/4/3/2 SDRAM Memory Controller IP across a broad range of …
- Controller
Memory interface IP cores provide the critical connectivity layer between processing elements and memory devices, enabling high-bandwidth, low-latency, and power-efficient data access in modern SoC, ASIC, AI, networking, and high-performance computing designs.
This category includes DDR, LPDDR, GDDR, HBM, NAND Flash, and NOR Flash interface IP solutions, covering memory controllers, PHYs, controller-PHY subsystems, training engines, calibration logic, and complete memory interface architectures. These IP cores are designed to maximize memory bandwidth, optimize latency, ensure signal integrity, and simplify integration across advanced semiconductor process nodes.
Dolphin Technology offers high performance DDR4/3/2 SDRAM and LPDDR5/4x/4/3/2 SDRAM Memory Controller IP across a broad range of …
The UniIC GDDR6 PHY,subsequently referred to as the UNIIC_GD6PHY, is designed for performance and power efficiency, its target is…
The DDR PHY IP is a combination of hard macro, I/O Pad and synthesizable RTL to provide a physical interface to JEDEC standard DD…
The DDR controller (DDR4/LPDDR4 Controller) supports the following SDRAM types: DDR4 LPDDR4 On the host side, DDR4/LPDDR4 Control…
The GMC (General Memory Controller) includes two memory controllers: The NOR/PSRAM memory controller The Synchronous DRAM (SDRAM/…
ONFI 5.0 NAND Flash Controller IP Compliant to JEDEC
The NAND flash controller IP provides easy, reliable access to an off-chip NAND flash.
ONFI 4.2 NAND Flash Software Driver
The NAND Flash landscape is changing and the Arasan NAND Flash Controller IP Core is changing in accordance with it.
ONFI 4.2 NAND Flash Controller & PHY IP Compliant to JEDEC
The NAND Flash landscape is changing and the NAND Flash Controller IP Core is changing in accordance with it.
RLDRAM II Controller Intel® FPGA IP
IP
QDR II SRAM Controller Intel® FPGA IP Function
The QDR II SRAM Controller Intel FPGA IP provides an easy-to-use interface to QDR II SRAM and QDR II+ SRAM modules.
QDR II SRAM Controller Intel® FPGA IP
The QDR II SRAM Controller Intel® FPGA IP function provides an easy-to-use interface to QDR II SRAM modules.
Intel® FPGA IP for DDR3 SDRAM High-Performance Controller
The Intel FPGA Intellectual Property (IP) for DDR3 SDRAM High-Performance Controller provides simplified interfaces to industry-s…
DDR and DDR2 SDRAM Controller with ALTMEMPHY Intel® FPGA IP
The DDR and DDR2 SDRAM Controller with ALTMEMPHY Intel FPGA Intellectual Property (IP) provides simplified interfaces to industry…
High-Performance Memory Controller II SDRAM Intel® FPGA IP Core
The High-Performance Memory Controller II SDRAM Intel FPGA IP core handles the complex aspects of using DDR, DDR2, and DDR3 SDRAM…
DDR and DDR2 SDRAM Controller Intel® FPGA IP Core
The DDR and DDR2 SDRAM controllers handle the complex aspects of using DDR and DDR2 SDRAM—initializing the memory devices, managi…
DDR5 Controller - Ensures high-speed, efficient operation and compatibility of memory controllers
DDR5 Verification IP supports data rates up to 8400 MT/s, ensuring high-performance memory controllers meet the latest standards …
NAND Flash Controller - Ensures robust NAND Flash interface validation for reliable designs
The NAND Flash Controller Verification IP (VIP) is a specialized tool for validating and simulating NAND Flash memory interfaces …
LPDDR5 Controller - Validates memory controllers for high-speed, power-efficient performance
LPDDR5 Verification IP (VIP) is a tool designed to simulate and validate the functionality of LPDDR5 memory controllers.
GDDR5 Controller - Verifies memory compliance, boosts performance, and ensures reliability
The GDDR5 Memory Controller Verification IP (VIP) is a robust solution designed to verify the compliance and performance of GDDR5…
GDDR4 Controller - Validates high-speed memory controllers for efficiency and reliability
The GDDR4 Controller Verification IP (VIP) ensures robust simulation and validation of GDDR4 memory controllers in SoC designs.