Vendor: Nuclei System Technology Category: DDR

General Memory Controller

The GMC (General Memory Controller) includes two memory controllers: The NOR/PSRAM memory controller The Synchronous DRAM (SDRAM/…

Controller View all specifications

Overview

The GMC (General Memory Controller) includes two memory controllers:

  •  The NOR/PSRAM memory controller
  •  The Synchronous DRAM (SDRAM/Mobile LPSDR SDRAM) controller

Key features

  • Interface with static-memory mapped devices including:
    • Static random access memory (SRAM)
    • NOR Flash memory/OneNAND Flash memory
    • PSRAM (4 memory banks)
  • Interface with synchronous DRAM (SDRAM/Mobile LPSDR SDRAM) memories
  • Burst mode support for faster access to synchronous devices such as NOR Flash memory, PSRAM and SDRAM)
  • Programmable continuous clock output for asynchronous and synchronous accesses
  • 8-,16- or 32-bit wide data bus
  • Independent Chip Select control for each memory bank

Specifications

Identity

Part Number
GMC
Vendor
Nuclei System Technology
Type
Silicon IP
Controller / PHY
Controller

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about DDR IP core

Frequently asked questions about DDR Interface IP

What is General Memory Controller?

General Memory Controller is a DDR IP core from Nuclei System Technology listed on Semi IP Hub.

How should engineers evaluate this DDR?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DDR IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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