MIPI DSI IP
As part of the MIPI (Mobile Industry Processor Interface) standard, MIPI DSI IP supports high-definition video and graphics transmission, making it ideal for smartphones, tablets, automotive displays, and wearables. With its ability to deliver high-quality image output while minimizing power consumption, MIPI DSI IP plays a vital role in enhancing the display performance of modern devices.
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MIPI DSI IP
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103
MIPI DSI IP
from 17 vendors
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10)
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MIPI DSI v2.2 Verification IP
- Compliant to MIPI DSI Specification version 2.2 and MIPI C-PHY Specification version 2.1 with PPI interface.
- Support all Calibration Format & operations
- C-PHY supports MFAA and SFAA for DSI TX and RX respectively for Data Lane Module in command mode.
- C-PHY supports MFAN and SFAN for DSI TX and RX respectively for data Lane Module in video mode.
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MIPI DSI v1.3.2 Verification IP
- Compliant to MIPI DSI Specification version 1.3.2 and MIPI D-PHY Specification version 1.2 with PPI interface.
- Support all Calibration Formats & operations
- D-PHY supports MFAA and SFAA for DSI TX and RX respectively for Data Lane Module in command mode.
- D-PHY supports MFAN and SFAN for DSI TX and RX respectively for Data Lane Module in video mode.
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MIPI DSI2
- Fully MIPI DSI-2/DSI standard compliant
- 64 and 32-bit core widths
- Host (Tx) and Peripheral (Rx) versions
- Supports 1-4, 9.0+ Gbps D-PHY data lanes
- Supports 1-4, 6.0+ Gsym/s C-PHY lane (trio)
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MIPI DSI DisplayTransmitter IP
- MIPI DSI Transmitter IP is designed to transmit the data to the host processor
- The MIPI DSI-2 provides the mobile industry a standard, robust, scalable, low-power, high-speed, cost-effective interface that supports a wide range of imaging solutions for mobile devices
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MIPI DSI-2 Controller Core
- Fully MIPI DSI-2/DSI standard compliant
- 64 and 32-bit core widths
- Host (Tx) and Peripheral (Rx) versions
- Supports 1-4, 9.0+ Gbps D-PHY data lanes
- Supports 1-4, 6.0+ Gsym/s C-PHY lane (trio)
- Supports all data types
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Simulation VIP for MIPI DSI-2
- Receiver and Transmitter Verification
- Verifies both DSI processor and peripheral
- Physical Layer
- Includes the MIPI D-PHYsm/C-PHYsm VIP for physical layer verification
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Simulation VIP for MIPI DPI
- Transmitter and Receiver
- Drives or monitors all possible frames
- Physical Layer
- Supports all color coding (16/18/24 bits and configuration 1, 2, 3)
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Simulation VIP for MIPI DBI
- Configuration/Data
- Supports protocol checks of signal timings
- Data
- Supports a variety of callbacks for better control and monitor functions
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MIPI DSI-2 Verification IP
- Full MIPI DSI-2 Tx and Rx functionality.
- Supports 2.0 MIPI DSI-2 Specification.
- Support both DPHY and CPHY
- Supports MIPI DBI specification
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MIPI DSI Verification IP
- Full MIPI DSI Transmitter and Receiver functionality.
- Supports 1.3.1 MIPI DSI/2.0 MIPI DSI-2 Specifications.
- Supports PPI interface.
- Operates as a Transmitter, Receiver, or both.
