Vendor: MAXVY Technologies Pvt Ltd Category: MIPI

MIPI CSI2 Receiver Interface

The MIPI CSI-2 (Camera Serial Interface) defines an interface between a peripheral device (camera) and host processor (applicatio…

Overview

The MIPI CSI-2 (Camera Serial Interface) defines an interface between a peripheral
device (camera) and host processor (application engine) for mobile applications.
The MIPI CSI-2 provides the mobile industry a standard, robust, scalable, low-power,
high-speed, cost-effective interface that supports a wide range of imaging solutions for
mobile devices.

Key features

  • Compliance as per MIPI-CSI-2 version3.0.
  • Compliance with C-PHY 2.0 for MIPI CSI-2 Version3.0
  • Compliance with D-PHY 2.5 for MIPI CSI-2 Version3.0.
  • Compatibility with I2C and I3C(SDR,DDR) for CCI interface
  • CSI-2 Receiver supports C-PHY 2.0/ D-PHY 2.5/ A-PHY/ M-PHY. Only one PHY layer
  • can be configured at a time of transmission.
  • Processor Interfaces are AHB Lite/APB/AXI for configuration.
  • CSI-2 Receiver Supports Lane merging Function from N-Lanes and consolidate into
  • complete packet for LLP.
  • In D-PHY, CSI-2 Receiver will detect the de-skew pattern. On communication with low
  • transmit frequencies, it will bypass the de-skew mechanism.
  • In C-PHY, CSI-2 Receiver supports the sync word detection during payload reception.
  • Pixel format supported are: YUV (420/422), RGB (888/666/565/555/444), RAW
  • (6/7/8/10/12/14/16/20/24), Generic 8-bit long packet data types, user defined byte based
  • data.
  • Supports 16 Virtual channels for D-PHY and 32 Virtual channels for C-PHY.
  • Supports error detection in data payload, data interleaving, scrambling and descrambling.
  • Supports byte to pixel conversion in LLP layer.

Block Diagram

MIPI CSI2-RX v3 block diagram

Benefits

  • Compliance as per MIPI-CSI-2 version3.0.
  • Compliance with C-PHY 2.0 for MIPI CSI-2 Version3.0
  • Compliance with D-PHY 2.5 for MIPI CSI-2 Version3.0.
  • Compatibility with I2C and I3C(SDR,DDR) for CCI interface
  • Royalty free
  • Good Technical Support
  • 100% functional and code Coverage
  • C, c++ firmware support
  • Integration guide for major Processor interface like ARM, RISC-V, MIPS

Applications

  • Imaging
  • Surveillance
  • Gaming
  • Sensor devices
  • Internet of Things (IoT)
  • Wearable devices
  • Virtual Reality
  • Augmented Reality
  • Automotive Systems

What’s Included?

  • Verilog Source Code
  • User Guide
  • IP Integration Guide
  • Run and Synthesis Script
  • Encrypted Verification Test-bench Environment,
  • Basic Test-suite

Specifications

Identity

Part Number
MIPI CSI2-RX v3
Vendor
MAXVY Technologies Pvt Ltd
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Frequently asked questions about MIPI IP cores

What is MIPI CSI2 Receiver Interface?

MIPI CSI2 Receiver Interface is a MIPI IP core from MAXVY Technologies Pvt Ltd listed on Semi IP Hub.

How should engineers evaluate this MIPI?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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