MIPI DSI With D-PHY Verification IP

Truechip's MIPI DSI Verification IP provides an effective & efficient way to verify the components interfacing with MIPI DSI interface of an IP or SoC. 

Truechip's MIPI DSI VIP is fully compliant with Standard MIPI DSI Version 1.3 and MIPI D-PHY Specification version 2.1 with PPI Interface specifications from MIPI Alliance. This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design cycle time.

• Compliant to MIPI DSI v1.3.1 and MIPI D-PHY v2.1 with PPI Interface.
• D-PHY Supports MFAA and SFAA for DSI Tx and Rx respectively for data Lane in command mode.
• D-PHY Supports MCNN and SCNN for DSI Tx and Rx respectively for clock Lane in command mode and video mode.
• D-PHY Supports MFAN and SFAN for DSI Tx and Rx respectively for data Lane in video mode.
• Configurable number of Data Lanes and Sub Links.
• Supports all Short and Long packet.
• Supports ECC and CRC.
• Supports End of Transmission packet along with EOT Sequence.
• Lane Management layer to control multi lane Merging and Distribution.
• Supports Hs data transmission and Escape mode transmission in forward direction.
• Supports Escape mode transmission in reverse direction in case of command mode.
• Supports Continuous and Non Continuous clock behavior.
• Supports 8b9b Line Encoding/Decoding.
• Supports dynamically configurable modes.
• Strong Protocol Monitor with real time exhaustive programmable checks.
• Supports Dynamic as well as Static Error Injection scenarios.
• On the fly protocol checking using protocol check functions, static and dynamic assertion.
• Built in Coverage analysis.
• Provides a comprehensive user API (callbacks) in Master and Slave.
• Graphical analyser to show transactions for easy debugging

• Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
• Unique development methodology to ensure highest levels of quality
• Availability of Compliance & Regression Test Suites
• 24X5 customer support
• Unique and customizable licensing models
• Exhaustive set of assertions and coverage points with connectivity example for all the components
• Consistency of interface, installation, operation and documentation across all our VIPs
• Provide complete solution and easy integration in IP and SoC environment.

• MIPI DSI TX/RX BFM/Agent
• MIPI DSI Monitor and Scoreboard
• Testbench Configurations
• Test Environment & Test Suite :
  • Basic and Directed Protocol Tests
  • Random Tests
  • Error Scenario Tests
  • Assertions & Coverage Tests
• Integration Guide, User Manual and Release Notes